/************************************************************************************
 * macros.h
 *                            
 *  synopsis: Contains most macro (text-replacement) definitions. Code segments are
 *            converted into macros if they are 1) repetitive in nature or 2) devoted
 *     to a single class of functionality, and taking them out of the function code
 *     enhances readability (less cluttered code).  The macros' functions must either
 *     not be critical to other code in the function, or easily comprehensible via
 *     the macro name.
 *
 *  Douglas Ferguson, UW Madison/LBNL   (510) 486-5230           dpferguson@lbl.gov
 ************************************************************************************/
#ifndef MACROS_H
#define MACROS_H 

#include "timing.h"

/******************** Histogramming Error & Warning macros: *************************/
#define histoVerboseAsmWarnM() {  \
	newInformation(__FILE__, __LINE__, \
	   "histoSetup warning: verbose mode is not supported in assembly," \
	   " flag will be ignored.\n"); \
}

#define histoFormatAsmFatalM() { \
	newError(&returnCode, ASM_FORMAT_ERROR, FATAL_ERR, "histoSetup", \
	   "The full data format is a diagnostic mode supported in the c code only.\n", \
	   __FILE__, __LINE__);  \
	return returnCode;       \
}

#define histoBinSizeAsmFatalM() { \
	newError(&returnCode, ASM_BINSIZE_ERROR, FATAL_ERR, "histoSetup", \
	   "The selected bin size is not yet implemented in assembly code.\n", \
	   __FILE__, __LINE__);  \
	return returnCode;       \
}

#define histoChipOccAsmFatalM() { \
	newError(&returnCode, ASM_CHIPOCC_ERROR, FATAL_ERR, "histoSetup", \
	   "Chip occupancy histograms are not yet implemented in assembly code.\n", \
	   __FILE__, __LINE__);  \
	return returnCode;       \
}

/******************************** Debugging Tools: **********************************/
#if (defined(I_AM_MASTER_DSP))

#elif (defined(I_AM_SLAVE_DSP))

#define eventInfo0M {                                       \
	CSR&= ~1;                                               \
	genEventInfo->code=         0;                          \
	genEventInfo->loopCnt =     READ_REG(LOOP_REG);         \
	genEventInfo->timeStamp=    TIMER_getCount(timer1);     \
	genEventInfo->procTime=    0;                           \
                                                            \
	genEventInfo->trapStat[0]=  READ_REG(TRAPSTAT_REG1_0);  \
	genEventInfo->trapStat[1]=  READ_REG(TRAPSTAT_REG1_1);  \
	genEventInfo->trapStat[2]=  READ_REG(TRAPSTAT_REG1_2);  \
	genEventInfo->isrState=     evtMgrCtrl.isrState;        \
                                                            \
	genEventInfo->nEvents=      evtMgrCtrl.nEventsTot;      \
	genEventInfo->nHistoEvents= READ_REG(HSTAT_REG_1);      \
	genEventInfo->p4MaskStat=   MCBSP_FGET(PCR1, DXSTAT);   \
	genEventInfo->maskFlag=     evtMgrCtrl.pin4MaskDown;    \
                                                            \
	if ((++genEventInfo) >= ((GenEventInfo *) 0xb4000000))  \
		genEventInfo= (GenEventInfo *) 0xb0000000;          \
                                                            \
	CSR|=  1;                                               \
}

#define eventInfo1M {                                       \
	CSR&= ~1;                                               \
	genEventInfo->code=         1;                          \
	genEventInfo->loopCnt =     READ_REG(LOOP_REG);         \
	genEventInfo->timeStamp=    TIMER_getCount(timer1);     \
	genEventInfo->procTime=     0;                          \
                                                            \
	genEventInfo->trapStat[0]=  READ_REG(TRAPSTAT_REG1_0);  \
	genEventInfo->trapStat[1]=  READ_REG(TRAPSTAT_REG1_1);  \
	genEventInfo->trapStat[2]=  READ_REG(TRAPSTAT_REG1_2);  \
	genEventInfo->isrState=     evtMgrCtrl.isrState;        \
                                                            \
	genEventInfo->nEvents=      evtMgrCtrl.nEventsTot;      \
	genEventInfo->nHistoEvents= READ_REG(HSTAT_REG_1);      \
	genEventInfo->p4MaskStat=   MCBSP_FGET(PCR1, DXSTAT);   \
	genEventInfo->maskFlag=     evtMgrCtrl.pin4MaskDown;    \
                                                            \
	if ((++genEventInfo) >= ((GenEventInfo *) 0xb4000000))  \
		genEventInfo= (GenEventInfo *) 0xb0000000;          \
                                                            \
	CSR|=  1;                                               \
}

#define eventInfo2M {                                       \
	CSR&= ~1;                                               \
	genEventInfo->code=         2;                          \
	genEventInfo->loopCnt =     READ_REG(LOOP_REG);         \
	genEventInfo->timeStamp=    TIMER_getCount(timer1);     \
	genEventInfo->procTime=     0;                          \
                                                            \
	genEventInfo->trapStat[0]=  READ_REG(TRAPSTAT_REG1_0);  \
	genEventInfo->trapStat[1]=  READ_REG(TRAPSTAT_REG1_1);  \
	genEventInfo->trapStat[2]=  READ_REG(TRAPSTAT_REG1_2);  \
	genEventInfo->isrState=     evtMgrCtrl.isrState;        \
                                                            \
	genEventInfo->nEvents=      evtMgrCtrl.nEventsTot;      \
	genEventInfo->nHistoEvents= READ_REG(HSTAT_REG_1);      \
	genEventInfo->p4MaskStat=   MCBSP_FGET(PCR1, DXSTAT);   \
	genEventInfo->maskFlag=     evtMgrCtrl.pin4MaskDown;    \
                                                            \
	if ((++genEventInfo) >= ((GenEventInfo *) 0xb4000000))  \
		genEventInfo= (GenEventInfo *) 0xb0000000;          \
                                                            \
	CSR|=  1;                                               \
}

#define eventInfo3M {                                       \
	CSR&= ~1;                                               \
	genEventInfo->code=         3;                          \
	genEventInfo->loopCnt =     READ_REG(LOOP_REG);         \
	genEventInfo->timeStamp=    TIMER_getCount(timer1);     \
	genEventInfo->procTime=     procTime;                   \
                                                            \
	genEventInfo->trapStat[0]=  READ_REG(TRAPSTAT_REG1_0);  \
	genEventInfo->trapStat[1]=  READ_REG(TRAPSTAT_REG1_1);  \
	genEventInfo->trapStat[2]=  READ_REG(TRAPSTAT_REG1_2);  \
	genEventInfo->isrState=     evtMgrCtrl.isrState;        \
                                                            \
	genEventInfo->nEvents=      evtMgrCtrl.nEventsTot;      \
	genEventInfo->nHistoEvents= READ_REG(HSTAT_REG_1);      \
	genEventInfo->p4MaskStat=   MCBSP_FGET(PCR1, DXSTAT);   \
	genEventInfo->maskFlag=     evtMgrCtrl.pin4MaskDown;    \
                                                            \
	if ((++genEventInfo) >= ((GenEventInfo *) 0xb4000000))  \
		genEventInfo= (GenEventInfo *) 0xb0000000;          \
                                                            \
	CSR|=  1;                                               \
}

//For the ISR, (**do NOT toggle GIE**):
#define eventInfo4M {                                       \
	genEventInfo->code=         4;                          \
	genEventInfo->loopCnt =     READ_REG(LOOP_REG);         \
	genEventInfo->timeStamp=    TIMER_getCount(timer1);     \
	genEventInfo->procTime=     0;                          \
                                                            \
	genEventInfo->trapStat[0]=  READ_REG(TRAPSTAT_REG1_0);  \
	genEventInfo->trapStat[1]=  READ_REG(TRAPSTAT_REG1_1);  \
	genEventInfo->trapStat[2]=  READ_REG(TRAPSTAT_REG1_2);  \
	genEventInfo->isrState=     evtMgrCtrl.isrState;        \
                                                            \
	genEventInfo->nEvents=      evtMgrCtrl.nEventsTot;      \
	genEventInfo->nHistoEvents= READ_REG(HSTAT_REG_1);      \
	genEventInfo->p4MaskStat=   MCBSP_FGET(PCR1, DXSTAT);   \
	genEventInfo->maskFlag=     evtMgrCtrl.pin4MaskDown;    \
                                                            \
	if ((++genEventInfo) >= ((GenEventInfo *) 0xb4000000))  \
		genEventInfo= (GenEventInfo *) 0xb0000000;          \
}

#endif

/********************************** Error Macros:  **********************************/
/* macros to check for errors and call error handler routines */
#define newErrFatalM(err, level, routine, msg) {                          \
	newError(&returnCode, err, level, routine, msg, __FILE__, __LINE__);  \
	if (FATAL(returnCode)) { return returnCode; }                         \
}

#define addErrFatalM(err, status, routine, subroutine) {                  \
	if (status != SUCCESS) {                                              \
		addError(err, status, routine, subroutine, __FILE__, __LINE__);   \
		if (FATAL(returnCode)) { return returnCode; }                     \
	}                                                                     \
}

#define newErrM(err, level, routine, msg) {                               \
	newError(&returnCode, err, level, routine, msg, __FILE__, __LINE__);  \
}

#define addErrM(err, status, routine, subroutine) {                       \
	if (status != SUCCESS) {                                              \
		addError(err, status, routine, subroutine, __FILE__, __LINE__);   \
	}                                                                     \
}

//Versions of the above macros which are specialized for primitives:
#define newErrPrimFatalM(err, level, msg) {                               \
	newError(&returnCode, err, level,                                     \
	         primParameters[primData->primIndex].name, msg,               \
	         __FILE__, __LINE__);                                         \
	if (FATAL(returnCode)) { return returnCode; }                         \
}

#define addErrPrimFatalM(err, status, subroutine) {                       \
	if (status != SUCCESS) {                                              \
		addError(&err, status, primParameters[primData->primIndex].name,  \
		         subroutine, __FILE__, __LINE__);                         \
		if (FATAL(returnCode)) { return returnCode; }                     \
	}                                                                     \
}

#define newErrPrimM(err, level, msg) {                                    \
	newError(&returnCode, err, level,                                     \
	         primParameters[primData->primIndex].name, msg,               \
	         __FILE__, __LINE__);                                         \
}

#define addErrPrimM(err, status, subroutine) {                            \
	if (status != SUCCESS) {                                              \
		addError(&err, status, primParameters[primData->primIndex].name,  \
		         subroutine, __FILE__, __LINE__);                         \
	}                                                                     \
}

/******************************** Simulation Macros: ********************************/
#if (defined(SIM))
	extern uint32 doSendCfg; //dpsf: see simulation.c for discussion.
	extern uint32 simTriggerSent, simEvtXmit, simEvtReceived;
	#define simulationM_cfg() {if (!doSendCfg) return SUCCESS; }

	/* Interrupts (async) disabled and timers are paused/resumed outside the function
	   calls to create as little interference as is possible with the timing of the
	   main routines. */

	//Check the FPGA register just accessed:
	#define simFpgaReadM(reg, wid, bit, val)  {   \
		UINT8 setGie= FALSE;                      \
		if (CSR & 1) {                            \
			CSR&= ~1;                             \
			setGie= TRUE;                         \
			pauseTimer(0);                        \
			pauseTimer(1);                        \
		}                                         \
		simFpgaCheck(TRUE, reg, wid, bit, val);   \
		if (setGie) {                             \
			resumeTimer(1);                       \
			resumeTimer(0);                       \
			CSR|= 1;                              \
		}                                         \
	}
	#define simFpgaWriteM(reg, wid, bit, val) {   \
		UINT8 setGie= FALSE;                      \
		if (CSR & 1) {                            \
			CSR&= ~1;                             \
			setGie= TRUE;                         \
			pauseTimer(0);                        \
			pauseTimer(1);                        \
		}                                         \
		simFpgaCheck(FALSE, reg, wid, bit, val);  \
		if (setGie) {                         \
			resumeTimer(1);                       \
			resumeTimer(0);                       \
			CSR|= 1;                              \
		}                                         \
	}

	//Calls a function which sets up the simulation for an "event".
	#define simTriggerArmM(sdsp) {                \
		UINT8 setGie= FALSE;                      \
		if (CSR & 1) {                            \
			CSR&= ~1;                             \
			setGie= TRUE;                         \
			pauseTimer(0);                        \
			pauseTimer(1);                        \
		}                                         \
		simTriggerArm(sdsp);                      \
		if (setGie) {                             \
			resumeTimer(1);                       \
			resumeTimer(0);                       \
			CSR|= 1;                              \
		}                                         \
	}

#else
	//Empty macros => do not affect non-simulation code at all.
	#define simFpgaWriteM(reg, wid, bit, val) { }
	#define simFpgaReadM(reg, wid, bit, val) { }
	#define simulationM_cfg() { }
	#define simTriggerArmM(sdsp)  { }
#endif


/********************************** Timing Macros: **********************************/
/* SendConfig timing macros; these use the configuration-timing structure defined
   in timing.h: */
#define timingMacro_cfg0() { \
	t0= TIMER_getCount(timer1);  \
	setMem((UINT32 *) &cfgTiming, SIZEOF(CfgTiming), 0); \
}

//Simulator has a bug & goes bezerk in SIM code if full macros are used:
#if defined(SIM)
//#if (defined(SCT_ROD) && defined(SIM))
	#define timingMacro_cfg1() { ++cfgTiming.ngbl;}
	#define timingMacro_cfg2() { ; }
	#define timingMacro_cfg3() { ; }
	#define timingMacro_cfg4() { ; }
	#define timingMacro_cfg5() { ; }
	#define timingMacro_cfg6() { ; }

#else
	#define timingMacro_cfg1() { \
		++cfgTiming.ngbl; \
		t1= TIMER_getCount(timer1);  len1= cb->bitIndex; \
	}
	
	#define timingMacro_cfg2() { \
		cfgTiming.gbl_mk=  delta_t(t1); \
		cfgTiming.gbl_len= cb->bitIndex -len1; \
	}
	
	#ifdef PIXEL_ROD
		#define timingMacro_cfg3() { \
			++cfgTiming.nreg; \
			t1= TIMER_getCount(timer1);  len1= cb->bitIndex; \
		}
		
		#define timingMacro_cfg4() { \
			cfgTiming.reg_mk=  delta_t(t1); \
			cfgTiming.reg_len= cb->bitIndex -len1; \
		}
	#endif
	
	#define timingMacro_cfg5() { \
		t1= TIMER_getCount(timer1);  len1= cb->bitIndex; \
	}
	
	#define timingMacro_cfg6() { \
		cfgTiming.enableDT_mk=  delta_t(t1); \
		cfgTiming.enableDT_len= cb->bitIndex -len1; \
	}
#endif


#define timingMacro_cfg7() { \
	cfgTiming.total= delta_t(t0); \
	cfgTiming.setup= cfgTiming.total -cfgTiming.xmit; \
	cfgTiming.cfg= cfgTiming.total -cfgTiming.setup; \
}

#define timingMacro_cfg8() { \
	if (GET_RBIT(DIAGNOSTIC_REG, DR_MODULE_CFG_LOOP)) { \
		sprintf(genStr, "%s\n  %s %d %d (%d %d)\n  %s %d %d\n  %s %d %d\n  %s %d %d\n  %s %d %d\n",  \
			"cfg timing info:",  \
			"total & setup times (ngbl, nreg): ",  cfgTiming.total, cfgTiming.setup, cfgTiming.ngbl, cfgTiming.nreg, \
			"interleaving & transmission times: ", cfgTiming.il, cfgTiming.xmit, \
			"EDT mk len: ",  cfgTiming.enableDT_mk, cfgTiming.enableDT_len, \
			"gbl mk len: ",  cfgTiming.gbl_mk, cfgTiming.gbl_len, \
			"reg mk len: ",  cfgTiming.reg_mk, cfgTiming.reg_len \
			);     \
		newInformation(__FILE__, __LINE__, genStr); \
	} \
}

/********************************** Waiting Macros: *********************************/
#define waitingMacro_cfg0() { \
	if (GET_RBIT(DIAGNOSTIC_REG, DR_MODULE_CFG_LOOP)) { \
		sprintf(genStr, "beginning loop= %d: sp= %d, jmax= %d.\n", loop, sp, jMax); \
		newInformation(__FILE__, __LINE__, genStr); \
		waitRegister(DIAGNOSTIC_REG, DR_STEP_TRIGGER, CONTEXT_ALL); \
	} \
}

#define waitingMacro_cfg1() { \
	if (GET_RBIT(DIAGNOSTIC_REG, DR_MODULE_CFG_LOOP)) { \
		if ((sp != SP_BOTH) || (j == (jMax -1)) ) { \
			sprintf(genStr, "%s  %s%d, %d%s  %s0x%08x 0x%08x  %s0x%x 0x%x %s", \
					"Prep to interleave/send stream. ", \
			        "mod[2]= ", mod[0], mod[1], ".\n", \
			        "stream[2]= ", (UINT32) stream[0], (UINT32) stream[1], \
			        "streamLen[2]= ", streamLen[0], streamLen[1], ".\n");  \
			newInformation(__FILE__, __LINE__, genStr); \
			waitRegister(DIAGNOSTIC_REG, DR_STEP_TRIGGER, CONTEXT_ALL); \
		} \
	} \
}

#define waitingMacro_cfg0a() { \
	if (GET_RBIT(DIAGNOSTIC_REG, DR_MODULE_CFG_LOOP)) { \
		sprintf(genStr, "sigh, cidx, nj, nMod, regSel, index= 0x%x 0x%x 0x%x 0x%x 0x%x\n", cidx, nj, nMod, regSelect, cmdBuffer[port].bitIndex); \
		newInformation(__FILE__, __LINE__, genStr); \
		waitRegister(DIAGNOSTIC_REG, DR_STEP_TRIGGER, CONTEXT_ALL); \
	} \
}

#define waitingMacro_cfg0b() { \
	if (GET_RBIT(DIAGNOSTIC_REG, DR_MODULE_CFG_LOOP)) { \
		sprintf(genStr, "sigh!, bit index= 0x%x\n", cmdBuffer[port].bitIndex); \
		newInformation(__FILE__, __LINE__, genStr); \
		waitRegister(DIAGNOSTIC_REG, DR_STEP_TRIGGER, CONTEXT_ALL); \
	} \
}

#define waitingMacro_cfg0c() { \
	if (GET_RBIT(DIAGNOSTIC_REG, DR_MODULE_CFG_LOOP)) { \
		sprintf(genStr, "edt!, bit index= 0x%x\n", cmdBuffer[port].bitIndex); \
		newInformation(__FILE__, __LINE__, genStr); \
		waitRegister(DIAGNOSTIC_REG, DR_STEP_TRIGGER, CONTEXT_ALL); \
	} \
}

#define waitingMacro_cfg2() { \
	if (GET_RBIT(DIAGNOSTIC_REG, DR_MODULE_CFG_LOOP)) { \
		sprintf(genStr, "leaving sendConfigSet...\n"); \
		newInformation(__FILE__, __LINE__, genStr); \
		waitRegister(DIAGNOSTIC_REG, DR_STEP_TRIGGER, CONTEXT_ALL); \
	} \
}

#endif /* Multiple-inclusion protection */