/******************************************************************************
 * 
 *  Title  : commandFunc_BOCSetup.c 
 *  Version 0.0
 *   
 *  Description: BOC setup
 *  
 *
 *  Author: Lukas Tomasek, tomasekl@fzu.cz
 *
 ******************************************************************************/

/******************************************************************************
 *                              Header files                                  *
 ******************************************************************************/

#include <stdio.h>
#include <stdlib.h>  
#include <time.h>   
#include "commandListDefinitions.h"  
#include "commandFunc_BOCSetup.h"
#include "commandParamsUir.h" 
#include "globalDefinitions.h"
#include "uirUtility.h" 
#include "commandStatusMessage.h"
#include "vmeHpiUtility.h"
#include "mainUir.h"  

/******************************************************************************
 *                               Definitions                                  *
 ******************************************************************************/
 

#define BOC_BASE 0x00408000
#define BOC_CREGS (BOC_BASE+0xF00)
#define BOC_BPMS (BOC_BASE+0x000)
#define BOC_TXDACS (BOC_BASE+0x600)
#define BOC_RXDELAYS (BOC_BASE+0x800)
#define BOC_RXDACS (BOC_BASE+0xC00)
#define BOC_CKGEN_DELAYS (BOC_BASE+0x980)

#define BOC_ACCESS_DELAY 10 /* milisec */


/******************************************************************************
 *                        Static Function Declarations                        *
 ******************************************************************************/

static ERROR_ID initBOCRegs(UINT8 slotNumber);

/******************************************************************************
 *                              Global functions                              *
 ******************************************************************************/

/*=============================================================================
 *                           commandFunction_BOCSetup()
 *=============================================================================
 *
 *	
 *
 */

ERROR_ID commandFunction_BOCSetup(COMMAND_FUNC_OPTION funcOption, struct COMMAND *command, UINT8 slotNumber, FILE *file){

	struct HOST *host;
	const int panel=global.panel.commandEdit[BOC_SETUP_ID];

	//struct BOC_SETUP_PARAMS *BOCSetup=&command->params.BOCSetup;
	
	int status;
	ERROR_ID errorId=SUCCESS;
	

	switch(funcOption){
	
		case COMMAND_TO_LIST:
		
			
	  		break;
		
		case LIST_TO_COMMAND:
			
			
			break;

		case COMMAND_EXECUTION:
			host=global.host[HOST_INDEX(slotNumber)];
		
			errorId=initBOCRegs(slotNumber);
			ERROR_CHECK(errorId, initBOCRegs());
			if(errorId!=SUCCESS){
				return(COMMAND_ERROR);
			}
 			break;
 			
 		case SAVE_CMD_TO_FILE:

  			// no params
		
			break;
			
		case LOAD_CMD_FROM_FILE:
		
  			// no params
  			
			break;		
 		
		default: ;
 	}


	return(SUCCESS);	
			
}

/******************************************************************************
 *                              Static functions                              *
 ******************************************************************************/

/*=============================================================================
 *                               initBOCRegs()
 *=============================================================================
 *
 *
 *
 */
static ERROR_ID initBOCRegs(UINT8 slotNumber){

ERROR_ID errorId;

UINT16 lasi[48]   ={  0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,
                      0xc0,0xc0,0xc0,0xc0,0x00,0x00,0x00,0x00,
                      0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
                      0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,	
                      0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
                      0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
  UINT16 thold[96] ={0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,	
                     0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,	
                     0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,	
                     0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,	
                     0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,	
                     0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,	
                     0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,	
                     0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
  UINT16 rdelay[96] ={00,00,00,00,00,00,00,00,00,00,00,00,
                      00,00,00,00,00,00,00,00,00,00,00,00,	
                      00,00,00,00,00,00,00,00,00,00,00,00,	
                      00,00,00,00,00,00,00,00,00,00,00,00,	
                      00,00,00,00,00,00,00,00,00,00,00,00,	
                      00,00,00,00,00,00,00,00,00,00,00,00,	
                      00,00,00,00,00,00,00,00,00,00,00,00,	
                      00,00,00,00,00,00,00,00,00,00,00,00 };
  UINT32 v;
  unsigned short RIG_Mod_Type,RIG_Mod_Vers,RIG_Manuf_LS,RIG_Manuf_MS,RIG_Firm_Vers,i ;
  
  UINT16 BOC_Mod_Type,BOC_Mod_SN,BOC_Manuf_LS,BOC_Manuf_MS,BOC_Firm_Vers;
  unsigned short stream,BPMno ;
  //unsigned short* BPMadd ;
  UINT32 BPMadd;
 

// Read BOC info:
  //BOC_WPEEK(BOC_CREGS+0x20,&v);
  errorId=RWmaster(READ, slotNumber, (UINT32)(BOC_CREGS+0x20*4), &v, 1, NO_HPIA_AUTOINCREMENT, 0); 
  ERROR_CHECK(errorId, RWmaster());
  Sleep(BOC_ACCESS_DELAY);
  BOC_Mod_Type   = v & 0xff;

  //BOC_WPEEK(BOC_CREGS+0x30,&v);
  errorId=RWmaster(READ, slotNumber, (UINT32)(BOC_CREGS+0x30*4), &v, 1, NO_HPIA_AUTOINCREMENT, 0); 
  ERROR_CHECK(errorId, RWmaster());
  Sleep(BOC_ACCESS_DELAY);    
  BOC_Mod_SN     = v & 0xff;
  
  //BOC_WPEEK(BOC_CREGS+0x21,&v);
  errorId=RWmaster(READ, slotNumber, (UINT32)(BOC_CREGS+0x21*4), &v, 1, NO_HPIA_AUTOINCREMENT, 0); 
  ERROR_CHECK(errorId, RWmaster());
  Sleep(BOC_ACCESS_DELAY);    
  BOC_Manuf_LS   = v & 0xff;
  
  //BOC_WPEEK(BOC_CREGS+0x22,&v);
  errorId=RWmaster(READ, slotNumber, (UINT32)(BOC_CREGS+0x22*4), &v, 1, NO_HPIA_AUTOINCREMENT, 0); 
  ERROR_CHECK(errorId, RWmaster());
  Sleep(BOC_ACCESS_DELAY);    
  BOC_Manuf_MS     = v & 0xff;
  
  //BOC_WPEEK(BOC_CREGS+0x23,&v);
  errorId=RWmaster(READ, slotNumber, (UINT32)(BOC_CREGS+0x23*4), &v, 1, NO_HPIA_AUTOINCREMENT, 0); 
  ERROR_CHECK(errorId, RWmaster());
  Sleep(BOC_ACCESS_DELAY);    
  BOC_Firm_Vers   = v & 0xff;

  printf("BOC Info:\n");
  printf(".. Type,S/N          : %X%  X\n",BOC_Mod_Type,BOC_Mod_SN);
  printf(".. Manufacturer      : %X%  X\n",BOC_Manuf_MS,BOC_Manuf_LS);
  printf(".. Firmware Version  : %X\n\n",BOC_Firm_Vers);
//
// Setup BOC parameters
  //BOC_WPOKE(BOC_CREGS+0x10,0x40); // Vernier Clock [7:0]
  v=0x40;
  errorId=RWmaster(WRITE, slotNumber, (UINT32)(BOC_CREGS+0x10*4), &v, 1, NO_HPIA_AUTOINCREMENT, 0); 
  ERROR_CHECK(errorId, RWmaster());
  Sleep(BOC_ACCESS_DELAY);    
  ERROR_CHECK(errorId, hpiWrite());     
  
  //BOC_WPEEK(BOC_CREGS+0x10,&v);
  errorId=RWmaster(READ, slotNumber, (UINT32)(BOC_CREGS+0x10*4), &v, 1, NO_HPIA_AUTOINCREMENT, 0); 
  ERROR_CHECK(errorId, RWmaster());
  Sleep(BOC_ACCESS_DELAY);    
  
//
  printf("BOC Vernier Clock Control read back as %02X hex\n",v & 0xff);
// PHOS4 Delay Chip settings
  //BOC_WPOKE(BOC_RXDELAYS,0);      // just to initialise the I2C0
  v=0x0;
  errorId=RWmaster(WRITE, slotNumber, (UINT32)BOC_RXDELAYS, &v, 1, NO_HPIA_AUTOINCREMENT, 0); 
  ERROR_CHECK(errorId, RWmaster());
  Sleep(BOC_ACCESS_DELAY);    
  
  //BOC_WPOKE(BOC_RXDELAYS+0x40,0); //   and I2C1
  v=0x0;
  errorId=RWmaster(WRITE, slotNumber, (UINT32)(BOC_RXDELAYS+0x40*4), &v, 1, NO_HPIA_AUTOINCREMENT, 0); 
  ERROR_CHECK(errorId, RWmaster());
  Sleep(BOC_ACCESS_DELAY);    
  
//
//
// setup Clock Gen Delays
  //BOC_WPOKE(BOC_CKGEN_DELAYS+0x0,0x00);
  v=0x0;
  errorId=RWmaster(WRITE, slotNumber, (UINT32)(BOC_CKGEN_DELAYS+0x0*4), &v, 1, NO_HPIA_AUTOINCREMENT, 0); 
  ERROR_CHECK(errorId, RWmaster());
  Sleep(BOC_ACCESS_DELAY);    
  
  //BOC_WPOKE(BOC_CKGEN_DELAYS+0x1,0x00);
  v=0x0;
  errorId=RWmaster(WRITE, slotNumber, (UINT32)(BOC_CKGEN_DELAYS+0x1*4), &v, 1, NO_HPIA_AUTOINCREMENT, 0); 
  ERROR_CHECK(errorId, RWmaster());
  Sleep(BOC_ACCESS_DELAY);    
  
  //BOC_WPOKE(BOC_CKGEN_DELAYS+0x2,0x0e); // B Reg Clock b)
  v=0x0e;
  errorId=RWmaster(WRITE, slotNumber, (UINT32)(BOC_CKGEN_DELAYS+0x2*4), &v, 1, NO_HPIA_AUTOINCREMENT, 0); 
  ERROR_CHECK(errorId, RWmaster());
  Sleep(BOC_ACCESS_DELAY);    
  
  //BOC_WPOKE(BOC_CKGEN_DELAYS+0x3,0x0e); // B Reg Clock a)
  v=0x0e;
  errorId=RWmaster(WRITE, slotNumber, (UINT32)(BOC_CKGEN_DELAYS+0x3*4), &v, 1, NO_HPIA_AUTOINCREMENT, 0); 
  ERROR_CHECK(errorId, RWmaster());
  Sleep(BOC_ACCESS_DELAY);    
  
//
  for(i=0;i<96;i++)
  { v = thold[i] ;  
    //BOC_WPOKE(BOC_RXDACS+i,v); 
    errorId=RWmaster(WRITE, slotNumber, (UINT32)(BOC_RXDACS+i*4), &v, 1, NO_HPIA_AUTOINCREMENT, 0); 
    ERROR_CHECK(errorId, RWmaster());
  	Sleep(BOC_ACCESS_DELAY);    
   
   }    // load up threshold dacs
//
  for(i=0;i<96;i++)
  { v = rdelay[i] ; 
     //BOC_WPOKE(BOC_RXDELAYS+i,v);
  	errorId=RWmaster(WRITE, slotNumber, (UINT32)(BOC_RXDELAYS+i*4), &v, 1, NO_HPIA_AUTOINCREMENT, 0); 
  	ERROR_CHECK(errorId, RWmaster());
  	Sleep(BOC_ACCESS_DELAY);    
     
  }   // load up data delays
  // set all the 4th channels of all 25 PHOS4s:
  for(i=0;i<100;i=i+4)
  { 
  	//BOC_WPOKE(BOC_RXDELAYS+0x80+i,0x00); 
  	v=0x0;
  	errorId=RWmaster(WRITE, slotNumber, (UINT32)(BOC_RXDELAYS+(0x80+i)*4), &v, 1, NO_HPIA_AUTOINCREMENT, 0); 
  	ERROR_CHECK(errorId, RWmaster());
  	Sleep(BOC_ACCESS_DELAY);    
  }
  //
  // now set laser currents:
  for(i=0;i<48;i++)
  { 
  	v = lasi[i] ;
  	//BOC_WPOKE(BOC_TXDACS+i,v); 
  	errorId=RWmaster(WRITE, slotNumber, (UINT32)(BOC_TXDACS+i*4), &v, 1, NO_HPIA_AUTOINCREMENT, 0); 
  	ERROR_CHECK(errorId, RWmaster());
  	Sleep(BOC_ACCESS_DELAY);    
  }
  // this to zero logic driven streams: inhibited by COMMINV bit to RIG's PIXEL8
  //VXIpoke(BOC_RIG_CREGS+1,2,2); //  BOC_RIG COMMINV = bit 1
    //v=2;
  	//errorId=hpiWrite(slotNumber, &v, (UINT32)(BOC_RIG_CREGS+1*4), 1);
  	//ERROR_CHECK(errorId, hpiWrite());     
  
// 
// *** Work Zone
// Set Up BPMs:
//  first reset BPMs:

//VXIpoke(BOC_CREGS+4,2,0);
  v=0;
  errorId=RWmaster(WRITE, slotNumber, (UINT32)(BOC_CREGS+4*4), &v, 1, NO_HPIA_AUTOINCREMENT, 0); 
  ERROR_CHECK(errorId, RWmaster());
  Sleep(BOC_ACCESS_DELAY);    


// now set up BPM registers to defaults
for (BPMno=0;BPMno<12;BPMno++)
{  BPMadd = BOC_BPMS + 0x20*BPMno*4; // bottom address of current BPM
   // Common BPM Registers
   //VXIpoke(BPMadd+1,2,0);               // 80MHz pulse width
   v=0;
   errorId=RWmaster(WRITE, slotNumber, (UINT32)(BPMadd+1*4), &v, 1, NO_HPIA_AUTOINCREMENT, 0); 
   ERROR_CHECK(errorId, RWmaster());
   Sleep(BOC_ACCESS_DELAY);    
   
   //VXIpoke(BPMadd+6,2,0);               // Mask Reg
   v=0;
   errorId=RWmaster(WRITE, slotNumber, (UINT32)(BPMadd+6*4), &v, 1, NO_HPIA_AUTOINCREMENT, 0); 
   ERROR_CHECK(errorId, RWmaster());
   Sleep(BOC_ACCESS_DELAY);    
   
   //VXIpoke(BPMadd+7,2,4);               // #1s in test data
   v=4;
   errorId=RWmaster(WRITE, slotNumber, (UINT32)(BPMadd+7*4), &v, 1, NO_HPIA_AUTOINCREMENT, 0); 
   ERROR_CHECK(errorId, RWmaster());
   Sleep(BOC_ACCESS_DELAY);    
   
   for(stream=0;stream<4;stream++) // per stream BPM registers
   { //VXIpoke(BPMadd+8*stream+0,2,1);    // Mode_and_Sync-Reset
   		v=1;
	    errorId=RWmaster(WRITE, slotNumber, (UINT32)(BPMadd+(8*stream+0)*4), &v, 1, NO_HPIA_AUTOINCREMENT, 0); 
  		ERROR_CHECK(errorId, RWmaster());
   		Sleep(BOC_ACCESS_DELAY);    
     
     //VXIpoke(BPMadd+8*stream+2,2,0);    // Coarse Delay
   		v=0;
	  	errorId=RWmaster(WRITE, slotNumber, (UINT32)(BPMadd+(8*stream*4+2)*4), &v, 1, NO_HPIA_AUTOINCREMENT, 0); 
  		ERROR_CHECK(errorId, RWmaster());
   		Sleep(BOC_ACCESS_DELAY);    
     
     //VXIpoke(BPMadd+8*stream+3,2,0x0e); // Mark-Space -ve edge
   		v=0x0e;
  		errorId=RWmaster(WRITE, slotNumber, (UINT32)(BPMadd+(8*stream*4+3)*4), &v, 1, NO_HPIA_AUTOINCREMENT, 0); 
  		ERROR_CHECK(errorId, RWmaster());
   		Sleep(BOC_ACCESS_DELAY);    
     
     //VXIpoke(BPMadd+8*stream+4,2,0x0c); // Mark-Space +ve edge
   		v=0x0c;
  		errorId=RWmaster(WRITE, slotNumber, (UINT32)(BPMadd+(8*stream+4)*4), &v, 1, NO_HPIA_AUTOINCREMENT, 0); 
  		ERROR_CHECK(errorId, RWmaster());
   		Sleep(BOC_ACCESS_DELAY);    
     
     //VXIpoke(BPMadd+8*stream+5,2,0);    // Fine delay
   		v=0;
  		errorId=RWmaster(WRITE, slotNumber, (UINT32)(BPMadd+(8*stream+5)*4), &v, 1, NO_HPIA_AUTOINCREMENT, 0); 
  		ERROR_CHECK(errorId, RWmaster());
   		Sleep(BOC_ACCESS_DELAY);    
     
   }
//
 }
return(0);
}

 
/******************************************************************************/