-- \\}"##&* <% V\ d n x             4 5 6 7 8 9 : ; < = > ? @ A B }C yD uE qF mG iH eI aJ ]K YL UM QN MO IP EQ AR =S 9T 5U 1V -W )X %Y !Z [ \ ] ^ _ ` a b c d e f g h i j k l m n o p q r s t u v w x y z { | } ~     } y u q m i e a ] Y U Q M I E A = 9 5 1 -e )o % !                                         } y u q m i e a ] Y U Q M I E A = 9 5 1 - ) % !         !"#$%&'()*+,-./\x\\@\\\l\\4\\\`\\(\\\T\\\\\H\\\t\\<\\\h\\0\\\\\\$\\\P\\\|\\D\\ \p\\8\\\d\ \ ,\ \ \ X\ \  \ \ \ L\ \ \ { \ \ E\ \ \ t\ \ > \ R\ f\ \ 7\ \ d; \ \  \ \@\w\\$\f$\C#\w\/.h/.1@//HCO1 ??????????-`.l3S3QdHID1 E;=Ltrigger times r.N-.h1@.N.MHCO1H ????@@@-`-3S/nHID1p>Bv?number of min bias pileup evts -)-1@--HCO1 ??????????-`)3S.NxHID1Dy?Number of 32 bit words in event fragment)%)1@))HCO1 -`%3S-HID1Dy?Latency: triggered BCO to MCC output in us %!%1@%%HCO1 @????????-`!3S)HID1Dy?Latency: triggered BCO to ROD output in us !!1@!!HCO1 DApB`B`BxABAAAA@AA0A@@AA A?@@@@@@@????@@?@@???@?????????-`3S%HID1C?pileup hits per link per event 1@HCO1 -`3S!HID1C?b jets hits per link per event N1@HCO1 B@AA0AAPA@@A @@@@@@@@@?@?@?????-`R3SHID1C?hits/link/event, SCT barrel 1 4N1@43HCO1 B?A`AA@A@@A@@@@@@?@@@@@?@??????-`3SHID1C?hits/link/event, SCT barrel 2 p1@poHCO1 C@AA@A@A0@@@@@@@@@?@@??@????-`3S4HID1C?hits/link/event, SCT barrel 3 1@HCO1 C*@@A@A@@@@@@@@@@@@??@?????????-`3SpHID1C?hits/link/event, SCT barrel 4 61@HCO1 pE!D B(@@-`3SHID1 4?@?cluster width 91@HCO1j AB(B@BTA BABdBBB AAAABdBhABBBBA0B|AA`BBBAAB`ApABBhB4ABBA@BBB AAPBB(ABHAB@@BDBHAAAPB@BdB4BAB4B4BLC!@?BB0A@CB4A@BPABAB$AAB,BpB|@A`BBAA-`=3SHID1`B?total pileup hits by link !91@! HCO1j `-`3SHID1`B?total b jet hits by link1@HCO1j AB(B@BTA BABdBBB AAAABdBhABBBBA0B|AA`BBBAAB`ApABBhB4ABBA@BBB AAPBB(ABHAB@@BDBHAAAPB@BdB4BAB4B4BLC!@?BB0A@CB4A@BPABAB$AAB,BpB|@A`BBAA-`3S!HID1`B?total hits by link, unscaled-1@HCO1 ?-`13SHID1F<output memory 0 occupancy F-1@HCO1 ?-`J3SHID1F<output memory 1 occupancy .F1@.-HCO1n ?-`3S4HID1dC>input buffer 0 occupancy1@HCO1n ?-`3S.5HID1dC>input buffer 1 occupancy1@HCO1n ?-`3S6HID1dC>input buffer 2 occupancyl1@lkHCO1n ?-`3S7HID1dC>input buffer 3 occupancyX1@HCO1n ?-`\3Sl8HID1dC>input buffer 4 occupancy@X1@@?HCO1n ?-`3S9HID1dC>input buffer 5 occupancy,1@HCO1n ?-`03S@:HID1dC>input buffer 6 occupancy,1@HCO1n ?-`3S;HID1dC>input buffer 7 occupancy~1@~}HCO1n ?-`3Sinput buffer 8 occupancy  j1@  HCO1n ?-` n3S~=HID1dC>input buffer 9 occupancy Q  j1@ Q PHCO1n ?-` 3S >HID1dC>input buffer 10 occupancy   < 1@  HCO1n ?-` @3S Q?HID1dC>input buffer 11 occupancy  #  <1@ # "HCO1n ?-` 3S @HID1dC>input buffer 12 occupancy    1@  HCO1n ?-` 3S #AHID1dC>input buffer 13 occupancy   w 1@  HCO1n ?-` {3S BHID1dC>input buffer 14 occupancy  ^  w1@ ^ ]HCO1n ?-` 3S CHID1dC>input buffer 15 occupancy   I 1@  HCO1n ?-` M3S ^DHID1dC>input buffer 16 occupancy  0 I1@ 0 /HCO1n ?-`3S EHID1dC>input buffer 17 occupancy 1@HCO1n ?-`3S 0FHID1dC>input buffer 18 occupancy 1@HCO1n ?-`3SGHID1dC>input buffer 19 occupancy k1@kjHCO1n ?-`3SHHID1dC>input buffer 20 occupancy V1@HCO1n ?-`Z3SkIHID1dC>input buffer 21 occupancy =V1@=<HCO1n ?-`3SJHID1dC>input buffer 22 occupancy (1@HCO1n ?-`,3S=KHID1dC>input buffer 23 occupancy (1@HCO1n ?-`3SLHID1dC>input buffer 24 occupancy x1@xwHCO1n ?-`3SMHID1dC>input buffer 25 occupancy c1@HCO1n ?-`g3SxNHID1dC>input buffer 26 occupancy Jc1@JIHCO1n ?-`3SOHID1dC>input buffer 27 occupancy 51@HCO1n ?-`93SJPHID1dC>input buffer 28 occupancy 51@HCO1n ?-`3SQHID1dC>input buffer 29 occupancy 1@HCO1n ?-` 3SRHID1dC>input buffer 30 occupancy p1@HCO1n ?-`t3SSHID1dC>input buffer 31 occupancy Wp1@WVHCO1n ?-`3STHID1dC>input buffer 32 occupancy B1@HCO1n ?-`F3SWUHID1dC>input buffer 33 occupancy )B1@)(HCO1n ?-`3SVHID1dC>input buffer 34 occupancy 1@HCO1n ?-`3S)WHID1dC>input buffer 35 occupancy }1@HCO1n ?-`3SXHID1dC>input buffer 36 occupancy d}1@dcHCO1n ?-`3SYHID1dC>input buffer 37 occupancy O1@HCO1n ?-`S3SdZHID1dC>input buffer 38 occupancy 6O1@65HCO1n ?-`3S[HID1dC>input buffer 39 occupancy !1@HCO1n ?-`%3S6\HID1dC>input buffer 40 occupancy !1@HCO1n ?-`3S]HID1dC>input buffer 41 occupancy q1@qpHCO1n ?-`3S^HID1dC>input buffer 42 occupancy \1@HCO1n ?-``3Sq_HID1dC>input buffer 43 occupancy C\1@CBHCO1n ?-`3S`HID1dC>input buffer 44 occupancy .1@HCO1n ?-`23SCaHID1dC>input buffer 45 occupancy .1@HCO1n ?-`3SbHID1dC>input buffer 46 occupancy ~1@~}HCO1n ?-`3ScHID1dC>input buffer 47 occupancy i1@HCO1n ?-`m3S~dHID1dC>input buffer 48 occupancy Pi1@POHCO1n ?-`3SeHID1dC>input buffer 49 occupancy ;1@HCO1n ?-`?3SPfHID1dC>input buffer 50 occupancy ";1@"!HCO1n ?-`3SgHID1dC>input buffer 51 occupancy  1@HCO1n ?-`3S"hHID1dC>input buffer 52 occupancy v 1@HCO1n ?-`z3SiHID1dC>input buffer 53 occupancy ]v1@]\HCO1n ?-`3SjHID1dC>input buffer 54 occupancy H1@HCO1n ?-`L3S]kHID1dC>input buffer 55 occupancy /H1@/.HCO1n ?-`3SlHID1dC>input buffer 56 occupancy 1@HCO1n ?-`3S/mHID1dC>input buffer 57 occupancy 1@HCO1n ?-`3SnHID1dC>input buffer 58 occupancy j1@jiHCO1n ?-`3SoHID1dC>input buffer 59 occupancy U1@HCO1n ?-`Y3SjpHID1dC>input buffer 60 occupancy <U1@<;HCO1n ?-`3SqHID1dC>input buffer 61 occupancy '1@HCO1n ?-`+3S<rHID1dC>input buffer 62 occupancy '1@ HCO1n ?-`3SsHID1dC>input buffer 63 occupancy w1@wvHCO1n ?-`3StHID1dC>input buffer 64 occupancy b1@HCO1n ?-`f3SwuHID1dC>input buffer 65 occupancy Ib1@IHHCO1n ?-`3SvHID1dC>input buffer 66 occupancy 41@HCO1n ?-`83SIwHID1dC>input buffer 67 occupancy 41@HCO1n ?-`3SxHID1dC>input buffer 68 occupancy 1@HCO1n ?-` 3SyHID1dC>input buffer 69 occupancy o1@HCO1n ?-`s3SzHID1dC>input buffer 70 occupancy Vo1@VUHCO1n ?-`3S{HID1dC>input buffer 71 occupancy A1@HCO1n ?-`E3SV|HID1dC>input buffer 72 occupancy (A1@('HCO1n ?-`3S}HID1dC>input buffer 73 occupancy 1@HCO1n ?-`3S(~HID1dC>input buffer 74 occupancy |1@HCO1n ?-`3SHID1dC>input buffer 75 occupancy c|1@cbHCO1n ?-`3SHID1dC>input buffer 76 occupancy N1@HCO1n ?-`R3ScHID1dC>input buffer 77 occupancy 5N1@54HCO1n ?-`3SHID1dC>input buffer 78 occupancy  1@HCO1n ?-`$3S5HID1dC>input buffer 79 occupancy  1@HCO1n ?-`3SHID1dC>input buffer 80 occupancy p1@poHCO1n ?-`3SHID1dC>input buffer 81 occupancy [1@HCO1n ?-`_3SpHID1dC>input buffer 82 occupancy B[1@BAHCO1n ?-`3SHID1dC>input buffer 83 occupancy -1@HCO1n ?-`13SBHID1dC>input buffer 84 occupancy -1@HCO1n ?-`3SHID1dC>input buffer 85 occupancy }1@}|HCO1n ?-`3SHID1dC>input buffer 86 occupancy h1@HCO1n ?-`l3S}HID1dC>input buffer 87 occupancy Oh1@ONHCO1n ?-`3SHID1dC>input buffer 88 occupancy ޸:1@޸޷HCO1n ?-`>3SOHID1dC>input buffer 89 occupancy !ݣ:1@! HCO1n ?-`ݧ3S޸HID1dC>input buffer 90 occupancy ݊ ݣ1@݊݉HCO1n ?-`3S!HID1dC>input buffer 91 occupancy u 1@HCO1n ?-`y3S݊HID1dC>input buffer 92 occupancy \u1@\[HCO1n ?-`3SHID1dC>input buffer 93 occupancy G1@HCO1n ?-`K3S\HID1dC>input buffer 94 occupancy .ڰG1@.-HCO1n ?-`ڴ3SHID1dC>input buffer 95 occupancy ڕڰ1@ڕڔHCO1j AAA0@APAA @AAAA`ApAA @AAAAAA A`A0AA A AAAA APAAApAPAAA`AAA@AAApAA@AAp@@AAA@A@AA AAAA`AA`AA`AAB@@APAA`AAAA@A AAPAAApAA0AAA@@AAApA`-`3S.HID1`B?peak input buffer occupancy by link ن1@HCO1j `-`ي3SڕHID1`B?events in header-only mode by link kن1@kjHCO1j `-`3SHID1`B?mean input buffer occupancy by link lׅ [YHAUT1@׆HCO1n d-`[3SkeHID1dtriggers per 40000 clock cycles vs time BgCׅ1@gfHCO1 AA`AAAApAAAA-`G3SoHID1@ A ?min bias pileup events every 40000 clock cycles K'C1@'&HCO1 0C\C\C\C\C\C\C\C\C\C\C\C\C\C\C\C\C\C\C\C\-`3SgHID1IA?output memory 0 each 40000 clock cycles K֭1@HCO1 @CPCPCPCPCPCPCPCPCPCPCPCPCPCPCPCPCPCPCPCP-`ֱ3S'HID1IA?output memory 1 each 40000 clock cycles M֏`֭1@֏֎HCO1 AAAAAAAAAAAAAAAAAAAA-`d3SHID1KA?input buffer 0 occupancy each 40000 clock cyclesMB`1@BAHCO1 hAAAAAAAAAAAAAAAAAAAA-`3S֏HID1KA?input buffer 1 occupancy each 40000 clock cyclesM1@HCO1 A0A0A0A0A0A0A0A0A0A0A0A0A0A0A0A0A0A0A0A0-`3SBHID1KA?input buffer 2 occupancy each 40000 clock cyclesMըy1@ըէHCO1 x@@@@@@@@@@@@@@@@@@@@-`}3SHID1KA?input buffer 3 occupancy each 40000 clock cyclesM[,y1@[ZHCO1 APAPAPAPAPAPAPAPAPAPAPAPAPAPAPAPAPAPAPAP-`03SըHID1KA?input buffer 4 occupancy each 40000 clock cyclesM,1@ HCO1 AAAAAAAAAAAAAAAAAAAA-`3S[HID1KA?input buffer 5 occupancy each 40000 clock cyclesMԒ1@HCO1 A A A A A A A A A A A A A A A A A A A A -`Ԗ3SHID1KA?input buffer 6 occupancy each 40000 clock cyclesMtEԒ1@tsHCO1 @@@@@@@@@@@@@@@@@@@@-`I3SHID1KA?input buffer 7 occupancy each 40000 clock cyclesM'E1@'&HCO1 hAAAAAAAAAAAAAAAAAAAA-`3StHID1KA?input buffer 8 occupancy each 40000 clock cyclesMӫ1@HCO1 AAAAAAAAAAAAAAAAAAAA-`ӯ3S'HID1KA?input buffer 9 occupancy each 40000 clock cyclesNӌ]ӫ1@ӌӋHCO1 hAAAAAAAAAAAAAAAAAAAA-`a3SHID1LA?input buffer 10 occupancy each 40000 clock cycles N>]1@>=HCO1 A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`-`3SӌHID1LA?input buffer 11 occupancy each 40000 clock cycles N1@HCO1 ,ApApApApApApApApApApApApApApApApApApApAp-`3S>HID1LA?input buffer 12 occupancy each 40000 clock cycles NҢs1@ҢҡHCO1 @AAAAAAAAAAAAAAAAAAAA-`w3SHID1LA?input buffer 13 occupancy each 40000 clock cycles NT%s1@TSHCO1 A A A A A A A A A A A A A A A A A A A A -`)3SҢHID1LA?input buffer 14 occupancy each 40000 clock cycles N%1@HCO1 @@@@@@@@@@@@@@@@@@@@-`3STHID1LA?input buffer 15 occupancy each 40000 clock cycles NѸщ1@ѸѷHCO1 @AAAAAAAAAAAAAAAAAAAA-`э3SHID1LA?input buffer 16 occupancy each 40000 clock cycles Nj;щ1@jiHCO1 AAAAAAAAAAAAAAAAAAAA-`?3SѸHID1LA?input buffer 17 occupancy each 40000 clock cycles N;1@HCO1 AAAAAAAAAAAAAAAAAAAA-`3SjHID1LA?input buffer 18 occupancy each 40000 clock cycles NП1@HCO1 AAAAAAAAAAAAAAAAAAAA-`У3SHID1LA?input buffer 19 occupancy each 40000 clock cycles NЀQП1@ЀHCO1 AAAAAAAAAAAAAAAAAAAA-`U3SHID1LA?input buffer 20 occupancy each 40000 clock cycles NÝnü1@ÝÜHCO1 A A A A A A A A A A A A A A A A A A A A -`r&HID1LA?input buffer 21 occupancy each 40000 clock cycles NO n1@ONHCO1 A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`-`$&ÝHID1LA?input buffer 22 occupancy each 40000 clock cycles N 1@HCO1 A0A0A0A0A0A0A0A0A0A0A0A0A0A0A0A0A0A0A0A0-`&OHID1LA?input buffer 23 occupancy each 40000 clock cycles N³„1@³²HCO1 AAAAAAAAAAAAAAAAAAAA-`ˆ&HID1LA?input buffer 24 occupancy each 40000 clock cycles Ne6„1@edHCO1 A A A A A A A A A A A A A A A A A A A A -`:&³HID1LA?input buffer 25 occupancy each 40000 clock cycles N61@HCO1 A A A A A A A A A A A A A A A A A A A A -`&eHID1LA?input buffer 26 occupancy each 40000 clock cycles N1@HCO1 AAAAAAAAAAAAAAAAAAAA-`&HID1LA?input buffer 27 occupancy each 40000 clock cycles N{L1@{zHCO1 TA\#S\#JS\#S\#S\#QS#\"S\"S\"XS\"S\"S\"_S\" S\"S\"fS\"S\"S\"mS\"S"\!S\!tS\!!S\!S\!{S\!(S\!S\!S\!/S\!S\!S\!6S!\ S\ S\ =S\ S\ S\ DS\ S\ S\ KS\ S\ S\ RS \S\S\YS\S\S\`S\ S\S\gS\S\S\nS\S\S\uS\"S\S\|S\)S\S\S\0S\S\S\7S\S\S\>S\S\S\ES\S\S\LS\S\S\SS\S\S\ZS\S\S\aS\S\R\jR\R\R\tR\"R\R\~R\,R\R\P\:P\G\q\\N\\\|\\D\\ \p\\8\\\d\\,\\\X\\ \\\L\\\x\\@\\\l\\4\\\`\\(\\\T\\\\\H\\\t\\<\\\h\\0\\\\\\$\\\P\\\|\\D\\ \p\\8\\\d\ \ ,\ \ \ X\ \  \ \ \ L\ \ \ { \ \ E\ \ \ t\ \ > \ R\ f\ \ 7\ \ d; \ \  \ \@\w\\$\f$\C#\w\AAAAAAAAAAAAAAAAAAA-`P&HID1LA?input buffer 28 occupancy each 40000 clock cycles N-L1@-,HCO1 hAAAAAAAAAAAAAAAAAAAA-`&{HID1LA?input buffer 29 occupancy each 40000 clock cycles N1@HCO1 A A A A A A A A A A A A A A A A A A A A -`&-HID1LA?input buffer 30 occupancy each 40000 clock cycles Nb1@HCO1 APAPAPAPAPAPAPAPAPAPAPAPAPAPAPAPAPAPAPAP-`f&HID1LA?input buffer 31 occupancy each 40000 clock cycles NCb1@CBHCO1 hAAAAAAAAAAAAAAAAAAAA-`&HID1LA?input buffer 32 occupancy each 40000 clock cycles N1@HCO1 AAAAAAAAAAAAAAAAAAAA-`&CHID1LA?input buffer 33 occupancy each 40000 clock cycles Nx1@HCO1 ,ApApApApApApApApApApApApApApApApApApApAp-`|&HID1LA?input buffer 34 occupancy each 40000 clock cycles NY*x1@YXHCO1 APAPAPAPAPAPAPAPAPAPAPAPAPAPAPAPAPAPAPAP-`.&HID1LA?input buffer 35 occupancy each 40000 clock cycles N *1@  HCO1 |AAAAAAAAAAAAAAAAAAAA-`&YHID1LA?input buffer 36 occupancy each 40000 clock cycles N1@HCO1 TAAAAAAAAAAAAAAAAAAAA-`& HID1LA?input buffer 37 occupancy each 40000 clock cycles No@1@onHCO1 A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`-`D&HID1LA?input buffer 38 occupancy each 40000 clock cycles N!@1@! HCO1 AAAAAAAAAAAAAAAAAAAA-`&oHID1LA?input buffer 39 occupancy each 40000 clock cycles N1@HCO1 AAAAAAAAAAAAAAAAAAAA-`&!HID1LA?input buffer 40 occupancy each 40000 clock cycles NV1@HCO1 @AAAAAAAAAAAAAAAAAAAA-`Z&HID1LA?input buffer 41 occupancy each 40000 clock cycles N7V1@76HCO1 @@@@@@@@@@@@@@@@@@@@-` &HID1LA?input buffer 42 occupancy each 40000 clock cycles N1@HCO1 TAAAAAAAAAAAAAAAAAAAA-`&7HID1LA?input buffer 43 occupancy each 40000 clock cycles Nl1@HCO1 hAAAAAAAAAAAAAAAAAAAA-`p&HID1LA?input buffer 44 occupancy each 40000 clock cycles NMl1@MLHCO1 ,ApApApApApApApApApApApApApApApApApApApAp-`"&HID1LA?input buffer 45 occupancy each 40000 clock cycles N1@HCO1 @AAAAAAAAAAAAAAAAAAAA-`&MHID1LA?input buffer 46 occupancy each 40000 clock cycles N1@HCO1 A@A@A@A@A@A@A@A@A@A@A@A@A@A@A@A@A@A@A@A@-`&HID1LA?input buffer 47 occupancy each 40000 clock cycles Nc41@cbHCO1 AAAAAAAAAAAAAAAAAAAA-`8&HID1LA?input buffer 48 occupancy each 40000 clock cycles N41@HCO1 ,ApApApApApApApApApApApApApApApApApApApAp-`&cHID1LA?input buffer 49 occupancy each 40000 clock cycles N1@HCO1 x@@@@@@@@@@@@@@@@@@@@-`&HID1LA?input buffer 50 occupancy each 40000 clock cycles NyJ1@yxHCO1 x@@@@@@@@@@@@@@@@@@@@-`N&HID1LA?input buffer 51 occupancy each 40000 clock cycles N+J1@+*HCO1 TAAAAAAAAAAAAAAAAAAAA-`&yHID1LA?input buffer 52 occupancy each 40000 clock cycles N1@HCO1 AAAAAAAAAAAAAAAAAAAA-`&+HID1LA?input buffer 53 occupancy each 40000 clock cycles N`1@HCO1 hAAAAAAAAAAAAAAAAAAAA-`d&HID1LA?input buffer 54 occupancy each 40000 clock cycles NA`1@A@HCO1 x@@@@@@@@@@@@@@@@@@@@-`&HID1LA?input buffer 55 occupancy each 40000 clock cycles N1@HCO1 A@A@A@A@A@A@A@A@A@A@A@A@A@A@A@A@A@A@A@A@-`&AHID1LA?input buffer 56 occupancy each 40000 clock cycles Nv1@HCO1 AAAAAAAAAAAAAAAAAAAA-`z& HID1LA?input buffer 57 occupancy each 40000 clock cycles NW(v1@WVHCO1 A A A A A A A A A A A A A A A A A A A A -`,& HID1LA?input buffer 58 occupancy each 40000 clock cycles N (1@ HCO1 @AAAAAAAAAAAAAAAAAAAA-`&W HID1LA?input buffer 59 occupancy each 40000 clock cycles N1@HCO1 AAAAAAAAAAAAAAAAAAAA-`&  HID1LA?input buffer 60 occupancy each 40000 clock cycles Nm>1@mlHCO1 @AAAAAAAAAAAAAAAAAAAA-`B& HID1LA?input buffer 61 occupancy each 40000 clock cycles N>1@HCO1 A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`-`&mHID1LA?input buffer 62 occupancy each 40000 clock cycles N1@HCO1 @AAAAAAAAAAAAAAAAAAAA-`&HID1LA?input buffer 63 occupancy each 40000 clock cycles NT1@HCO1 A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`-`X&HID1LA?input buffer 64 occupancy each 40000 clock cycles N5T1@54HCO1 hAAAAAAAAAAAAAAAAAAAA-` &HID1LA?input buffer 65 occupancy each 40000 clock cycles N1@HCO1 A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`-`&5HID1LA?input buffer 66 occupancy each 40000 clock cycles Nj1@HCO1 |AAAAAAAAAAAAAAAAAAAA-`n&HID1LA?input buffer 67 occupancy each 40000 clock cycles NKj1@KJHCO1 AAAAAAAAAAAAAAAAAAAA-` &HID1LA?input buffer 68 occupancy each 40000 clock cycles N1@HCO1 BBBBBBBBBBBBBBBBBBBB-`&KHID1LA?input buffer 69 occupancy each 40000 clock cycles N1@HCO1 @@@@@@@@@@@@@@@@@@@@-`&HID1LA?input buffer 70 occupancy each 40000 clock cycles Na21@a`HCO1 @@@@@@@@@@@@@@@@@@@@-`6&HID1LA?input buffer 71 occupancy each 40000 clock cycles N21@HCO1 APAPAPAPAPAPAPAPAPAPAPAPAPAPAPAPAPAPAPAP-`&aHID1LA?input buffer 72 occupancy each 40000 clock cycles N1@HCO1 AAAAAAAAAAAAAAAAAAAA-`&HID1LA?input buffer 73 occupancy each 40000 clock cycles NwH1@wvHCO1 A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`-`L&HID1LA?input buffer 74 occupancy each 40000 clock cycles N)H1@)(HCO1 AAAAAAAAAAAAAAAAAAAA-`&wHID1LA?input buffer 75 occupancy each 40000 clock cycles N1@HCO1 |AAAAAAAAAAAAAAAAAAAA-`&)HID1LA?input buffer 76 occupancy each 40000 clock cycles N^1@HCO1 AAAAAAAAAAAAAAAAAAAA-`b&HID1LA?input buffer 77 occupancy each 40000 clock cycles N?^1@?>HCO1 A@A@A@A@A@A@A@A@A@A@A@A@A@A@A@A@A@A@A@A@-`&HID1LA?input buffer 78 occupancy each 40000 clock cycles N1@HCO1 A A A A A A A A A A A A A A A A A A A A -`&?HID1LA?input buffer 79 occupancy each 40000 clock cycles Nt1@HCO1 AAAAAAAAAAAAAAAAAAAA-`x& HID1LA?input buffer 80 occupancy each 40000 clock cycles NU&t1@UTHCO1 APAPAPAPAPAPAPAPAPAPAPAPAPAPAPAPAPAPAPAP-`*&!HID1LA?input buffer 81 occupancy each 40000 clock cycles N&1@HCO1 AAAAAAAAAAAAAAAAAAAA-`&U"HID1LA?input buffer 82 occupancy each 40000 clock cycles N1@HCO1 AAAAAAAAAAAAAAAAAAAA-`&#HID1LA?input buffer 83 occupancy each 40000 clock cycles Nk<1@kjHCO1 ,ApApApApApApApApApApApApApApApApApApApAp-`@&$HID1LA?input buffer 84 occupancy each 40000 clock cycles N<1@HCO1 @AAAAAAAAAAAAAAAAAAAA-`&k%HID1LA?input buffer 85 occupancy each 40000 clock cycles N1@HCO1 A0A0A0A0A0A0A0A0A0A0A0A0A0A0A0A0A0A0A0A0-`&&HID1LA?input buffer 86 occupancy each 40000 clock cycles NR1@HCO1 AAAAAAAAAAAAAAAAAAAA-`V&'HID1LA?input buffer 87 occupancy each 40000 clock cycles N3R1@32HCO1 AAAAAAAAAAAAAAAAAAAA-`&(HID1LA?input buffer 88 occupancy each 40000 clock cycles N1@HCO1 AAAAAAAAAAAAAAAAAAAA-`&3)HID1LA?input buffer 89 occupancy each 40000 clock cycles Nh1@HCO1 @@@@@@@@@@@@@@@@@@@@-`l&*HID1LA?input buffer 90 occupancy each 40000 clock cycles NIh1@IHHCO1 @@@@@@@@@@@@@@@@@@@@-`&+HID1LA?input buffer 91 occupancy each 40000 clock cycles N1@HCO1 AAAAAAAAAAAAAAAAAAAA-`&I,HID1LA?input buffer 92 occupancy each 40000 clock cycles N~1@HCO1 AAAAAAAAAAAAAAAAAAAA-`&-HID1LA?input buffer 93 occupancy each 40000 clock cycles N_0~1@_^HCO1 ,ApApApApApApApApApApApApApApApApApApApAp-`4&.HID1LA?input buffer 94 occupancy each 40000 clock cycles N01@HCO1 A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`A`-`&_/HID1LA?input buffer 95 occupancy each 40000 clock cycles #HID1LA?input buffer 83 occupancy each 40000 clock cycles Nk<1@kjHCO1 ,ApApApApApApApApApApApApApApApApApApApAp-`@&$HID1LA?input buffer 84 occupancy each 40000 clock cycles N<1@HCO1 @AAAAAAAAAAAAAAAAAAAA-`&k%HID1LA?input buffer 85 occupancy each 40000 clock cycles N1@HCO1 A0A0A0A0A0A0A0A0A0A0A0A0A0A0A0A0A0A0A0A0-`&&HID1LA?input buffer 86 occupancy each 40000 clock cycles NR1@HCO1 AAAAAAAAAAAAAAAAAAAA-`V&'HID1LA?input buffer 87 occupancy each 40000 clock cycles N3R1@32HCO1 AAAAAAAAAAAAAAAAAAAA-`&(HID1LA?input buffer 88 occupancy each 40000 clock cycles N1@HCO1 AAAAAAAAAAAAAAAAAAAA-`&3)HID1LA?input buffer 89 occupancy each 40000 clock cycles N