Timing Report

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Design Name addrtime_ctrl
Device, Speed (SpeedFile Version) XC95144XL, -5 (3.0)
Date Created Tue Aug 08 14:16:31 2006
Created By Timing Report Generator: version I.32
Copyright Copyright (c) 1995-2006 Xilinx, Inc. All rights reserved.

Summary

Notes and Warnings
Note: This design contains no timing constraints.
Note: A default set of constraints using a delay of 0.000ns will be used for analysis.

Performance Summary
Min. Clock Period 5.600 ns.
Max. Clock Frequency (fSYSTEM) 178.571 MHz.
Limited by Clock Pulse Width for acqclk
Clock to Setup (tCYC) 5.600 ns.
Pad to Pad Delay (tPD) 5.700 ns.
Setup to Clock at the Pad (tSU) 3.700 ns.
Clock Pad to Output Pad Delay (tCO) 6.900 ns.

Timing Constraints

Constraint Name Requirement (ns) Delay (ns) Paths Paths Failing
TS1000 0.0 0.0 0 0
TS1001 0.0 0.0 0 0
AUTO_TS_F2F 0.0 5.6 528 528
AUTO_TS_P2P 0.0 6.9 131 131
AUTO_TS_P2F 0.0 4.8 34 34
AUTO_TS_F2P 0.0 5.8 32 32


Constraint: TS1000

Description: PERIOD:PERIOD_acqclk:0.000 nS
Path Requirement (ns) Delay (ns) Slack (ns)


Constraint: TS1001

Description: PERIOD:PERIOD_timeclk:0.000 nS
Path Requirement (ns) Delay (ns) Slack (ns)


Constraint: AUTO_TS_F2F

Description: MAXDELAY:FROM:FFS(*):TO:FFS(*):0.000 nS
Path Requirement (ns) Delay (ns) Slack (ns)
Inst_timer/lsb_count<0>.Q to Inst_timer/lsb_count<10>.D 0.000 5.600 -5.600
Inst_timer/lsb_count<0>.Q to Inst_timer/lsb_count<11>.D 0.000 5.600 -5.600
Inst_timer/lsb_count<0>.Q to Inst_timer/lsb_count<12>.D 0.000 5.600 -5.600


Constraint: AUTO_TS_P2P

Description: MAXDELAY:FROM:PADS(*):TO:PADS(*):0.000 nS
Path Requirement (ns) Delay (ns) Slack (ns)
acqclk to data_out<0> 0.000 6.900 -6.900
acqclk to data_out<10> 0.000 6.900 -6.900
acqclk to data_out<11> 0.000 6.900 -6.900


Constraint: AUTO_TS_P2F

Description: MAXDELAY:FROM:PADS(*):TO:FFS(*):0.000 nS
Path Requirement (ns) Delay (ns) Slack (ns)
latch_en to lsb_sig<0>.CE 0.000 4.800 -4.800
latch_en to lsb_sig<10>.CE 0.000 4.800 -4.800
latch_en to lsb_sig<11>.CE 0.000 4.800 -4.800


Constraint: AUTO_TS_F2P

Description: MAXDELAY:FROM:FFS(*):TO:PADS(*):0.000 nS
Path Requirement (ns) Delay (ns) Slack (ns)
lsb_sig<0>.Q to data_out<0> 0.000 5.800 -5.800
lsb_sig<10>.Q to data_out<10> 0.000 5.800 -5.800
lsb_sig<11>.Q to data_out<11> 0.000 5.800 -5.800



Number of constraints not met: 4

Data Sheet Report

Maximum External Clock Speeds

Clock fEXT (MHz) Reason
acqclk 178.571 Limited by Clock Pulse Width for acqclk
timeclk 178.571 Limited by Clock Pulse Width for timeclk

Setup/Hold Times for Clocks

Setup/Hold Times for Clock acqclk
Source Pad Setup to clk (edge) Hold to clk (edge)
latch_en 3.700 0.000


Clock to Pad Timing

Clock acqclk to Pad
Destination Pad Clock (edge) to Pad
data_out<0> 6.900
data_out<10> 6.900
data_out<11> 6.900
data_out<12> 6.900
data_out<13> 6.900
data_out<14> 6.900
data_out<15> 6.900
data_out<1> 6.900
data_out<2> 6.900
data_out<3> 6.900
data_out<4> 6.900
data_out<5> 6.900
data_out<6> 6.900
data_out<7> 6.900
data_out<8> 6.900
data_out<9> 6.900


Clock to Setup Times for Clocks

Clock to Setup for clock timeclk
Source Destination Delay
Inst_timer/lsb_count<0>.Q Inst_timer/lsb_count<10>.D 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/lsb_count<11>.D 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/lsb_count<12>.D 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/lsb_count<13>.D 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/lsb_count<14>.D 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/lsb_count<15>.D 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/lsb_count<1>.D 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/lsb_count<2>.D 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/lsb_count<3>.D 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/lsb_count<4>.D 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/lsb_count<5>.D 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/lsb_count<6>.D 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/lsb_count<7>.D 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/lsb_count<8>.D 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/lsb_count<9>.D 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/msb_count<0>.CE 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/msb_count<10>.CE 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/msb_count<11>.CE 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/msb_count<12>.CE 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/msb_count<13>.CE 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/msb_count<14>.CE 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/msb_count<15>.CE 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/msb_count<1>.CE 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/msb_count<2>.CE 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/msb_count<3>.CE 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/msb_count<4>.CE 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/msb_count<5>.CE 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/msb_count<6>.CE 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/msb_count<7>.CE 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/msb_count<8>.CE 5.600
Inst_timer/lsb_count<0>.Q Inst_timer/msb_count<9>.CE 5.600
Inst_timer/lsb_count<10>.Q Inst_timer/lsb_count<11>.D 5.600
Inst_timer/lsb_count<10>.Q Inst_timer/lsb_count<12>.D 5.600
Inst_timer/lsb_count<10>.Q Inst_timer/lsb_count<13>.D 5.600
Inst_timer/lsb_count<10>.Q Inst_timer/lsb_count<14>.D 5.600
Inst_timer/lsb_count<10>.Q Inst_timer/lsb_count<15>.D 5.600
Inst_timer/lsb_count<10>.Q Inst_timer/msb_count<0>.CE 5.600
Inst_timer/lsb_count<10>.Q Inst_timer/msb_count<10>.CE 5.600
Inst_timer/lsb_count<10>.Q Inst_timer/msb_count<11>.CE 5.600
Inst_timer/lsb_count<10>.Q Inst_timer/msb_count<12>.CE 5.600
Inst_timer/lsb_count<10>.Q Inst_timer/msb_count<13>.CE 5.600
Inst_timer/lsb_count<10>.Q Inst_timer/msb_count<14>.CE 5.600
Inst_timer/lsb_count<10>.Q Inst_timer/msb_count<15>.CE 5.600
Inst_timer/lsb_count<10>.Q Inst_timer/msb_count<1>.CE 5.600
Inst_timer/lsb_count<10>.Q Inst_timer/msb_count<2>.CE 5.600
Inst_timer/lsb_count<10>.Q Inst_timer/msb_count<3>.CE 5.600
Inst_timer/lsb_count<10>.Q Inst_timer/msb_count<4>.CE 5.600
Inst_timer/lsb_count<10>.Q Inst_timer/msb_count<5>.CE 5.600
Inst_timer/lsb_count<10>.Q Inst_timer/msb_count<6>.CE 5.600
Inst_timer/lsb_count<10>.Q Inst_timer/msb_count<7>.CE 5.600
Inst_timer/lsb_count<10>.Q Inst_timer/msb_count<8>.CE 5.600
Inst_timer/lsb_count<10>.Q Inst_timer/msb_count<9>.CE 5.600
Inst_timer/lsb_count<11>.Q Inst_timer/lsb_count<12>.D 5.600
Inst_timer/lsb_count<11>.Q Inst_timer/lsb_count<13>.D 5.600
Inst_timer/lsb_count<11>.Q Inst_timer/lsb_count<14>.D 5.600
Inst_timer/lsb_count<11>.Q Inst_timer/lsb_count<15>.D 5.600
Inst_timer/lsb_count<11>.Q Inst_timer/msb_count<0>.CE 5.600
Inst_timer/lsb_count<11>.Q Inst_timer/msb_count<10>.CE 5.600
Inst_timer/lsb_count<11>.Q Inst_timer/msb_count<11>.CE 5.600
Inst_timer/lsb_count<11>.Q Inst_timer/msb_count<12>.CE 5.600
Inst_timer/lsb_count<11>.Q Inst_timer/msb_count<13>.CE 5.600
Inst_timer/lsb_count<11>.Q Inst_timer/msb_count<14>.CE 5.600
Inst_timer/lsb_count<11>.Q Inst_timer/msb_count<15>.CE 5.600
Inst_timer/lsb_count<11>.Q Inst_timer/msb_count<1>.CE 5.600
Inst_timer/lsb_count<11>.Q Inst_timer/msb_count<2>.CE 5.600
Inst_timer/lsb_count<11>.Q Inst_timer/msb_count<3>.CE 5.600
Inst_timer/lsb_count<11>.Q Inst_timer/msb_count<4>.CE 5.600
Inst_timer/lsb_count<11>.Q Inst_timer/msb_count<5>.CE 5.600
Inst_timer/lsb_count<11>.Q Inst_timer/msb_count<6>.CE 5.600
Inst_timer/lsb_count<11>.Q Inst_timer/msb_count<7>.CE 5.600
Inst_timer/lsb_count<11>.Q Inst_timer/msb_count<8>.CE 5.600
Inst_timer/lsb_count<11>.Q Inst_timer/msb_count<9>.CE 5.600
Inst_timer/lsb_count<12>.Q Inst_timer/lsb_count<13>.D 5.600
Inst_timer/lsb_count<12>.Q Inst_timer/lsb_count<14>.D 5.600
Inst_timer/lsb_count<12>.Q Inst_timer/lsb_count<15>.D 5.600
Inst_timer/lsb_count<12>.Q Inst_timer/msb_count<0>.CE 5.600
Inst_timer/lsb_count<12>.Q Inst_timer/msb_count<10>.CE 5.600
Inst_timer/lsb_count<12>.Q Inst_timer/msb_count<11>.CE 5.600
Inst_timer/lsb_count<12>.Q Inst_timer/msb_count<12>.CE 5.600
Inst_timer/lsb_count<12>.Q Inst_timer/msb_count<13>.CE 5.600
Inst_timer/lsb_count<12>.Q Inst_timer/msb_count<14>.CE 5.600
Inst_timer/lsb_count<12>.Q Inst_timer/msb_count<15>.CE 5.600
Inst_timer/lsb_count<12>.Q Inst_timer/msb_count<1>.CE 5.600
Inst_timer/lsb_count<12>.Q Inst_timer/msb_count<2>.CE 5.600
Inst_timer/lsb_count<12>.Q Inst_timer/msb_count<3>.CE 5.600
Inst_timer/lsb_count<12>.Q Inst_timer/msb_count<4>.CE 5.600
Inst_timer/lsb_count<12>.Q Inst_timer/msb_count<5>.CE 5.600
Inst_timer/lsb_count<12>.Q Inst_timer/msb_count<6>.CE 5.600
Inst_timer/lsb_count<12>.Q Inst_timer/msb_count<7>.CE 5.600
Inst_timer/lsb_count<12>.Q Inst_timer/msb_count<8>.CE 5.600
Inst_timer/lsb_count<12>.Q Inst_timer/msb_count<9>.CE 5.600
Inst_timer/lsb_count<13>.Q Inst_timer/lsb_count<14>.D 5.600
Inst_timer/lsb_count<13>.Q Inst_timer/lsb_count<15>.D 5.600
Inst_timer/lsb_count<13>.Q Inst_timer/msb_count<0>.CE 5.600
Inst_timer/lsb_count<13>.Q Inst_timer/msb_count<10>.CE 5.600
Inst_timer/lsb_count<13>.Q Inst_timer/msb_count<11>.CE 5.600
Inst_timer/lsb_count<13>.Q Inst_timer/msb_count<12>.CE 5.600
Inst_timer/lsb_count<13>.Q Inst_timer/msb_count<13>.CE 5.600
Inst_timer/lsb_count<13>.Q Inst_timer/msb_count<14>.CE 5.600
Inst_timer/lsb_count<13>.Q Inst_timer/msb_count<15>.CE 5.600
Inst_timer/lsb_count<13>.Q Inst_timer/msb_count<1>.CE 5.600
Inst_timer/lsb_count<13>.Q Inst_timer/msb_count<2>.CE 5.600
Inst_timer/lsb_count<13>.Q Inst_timer/msb_count<3>.CE 5.600
Inst_timer/lsb_count<13>.Q Inst_timer/msb_count<4>.CE 5.600
Inst_timer/lsb_count<13>.Q Inst_timer/msb_count<5>.CE 5.600
Inst_timer/lsb_count<13>.Q Inst_timer/msb_count<6>.CE 5.600
Inst_timer/lsb_count<13>.Q Inst_timer/msb_count<7>.CE 5.600
Inst_timer/lsb_count<13>.Q Inst_timer/msb_count<8>.CE 5.600
Inst_timer/lsb_count<13>.Q Inst_timer/msb_count<9>.CE 5.600
Inst_timer/lsb_count<14>.Q Inst_timer/lsb_count<15>.D 5.600
Inst_timer/lsb_count<14>.Q Inst_timer/msb_count<0>.CE 5.600
Inst_timer/lsb_count<14>.Q Inst_timer/msb_count<10>.CE 5.600
Inst_timer/lsb_count<14>.Q Inst_timer/msb_count<11>.CE 5.600
Inst_timer/lsb_count<14>.Q Inst_timer/msb_count<12>.CE 5.600
Inst_timer/lsb_count<14>.Q Inst_timer/msb_count<13>.CE 5.600
Inst_timer/lsb_count<14>.Q Inst_timer/msb_count<14>.CE 5.600
Inst_timer/lsb_count<14>.Q Inst_timer/msb_count<15>.CE 5.600
Inst_timer/lsb_count<14>.Q Inst_timer/msb_count<1>.CE 5.600
Inst_timer/lsb_count<14>.Q Inst_timer/msb_count<2>.CE 5.600
Inst_timer/lsb_count<14>.Q Inst_timer/msb_count<3>.CE 5.600
Inst_timer/lsb_count<14>.Q Inst_timer/msb_count<4>.CE 5.600
Inst_timer/lsb_count<14>.Q Inst_timer/msb_count<5>.CE 5.600
Inst_timer/lsb_count<14>.Q Inst_timer/msb_count<6>.CE 5.600
Inst_timer/lsb_count<14>.Q Inst_timer/msb_count<7>.CE 5.600
Inst_timer/lsb_count<14>.Q Inst_timer/msb_count<8>.CE 5.600
Inst_timer/lsb_count<14>.Q Inst_timer/msb_count<9>.CE 5.600
Inst_timer/lsb_count<15>.Q Inst_timer/msb_count<0>.CE 5.600
Inst_timer/lsb_count<15>.Q Inst_timer/msb_count<10>.CE 5.600
Inst_timer/lsb_count<15>.Q Inst_timer/msb_count<11>.CE 5.600
Inst_timer/lsb_count<15>.Q Inst_timer/msb_count<12>.CE 5.600
Inst_timer/lsb_count<15>.Q Inst_timer/msb_count<13>.CE 5.600
Inst_timer/lsb_count<15>.Q Inst_timer/msb_count<14>.CE 5.600
Inst_timer/lsb_count<15>.Q Inst_timer/msb_count<15>.CE 5.600
Inst_timer/lsb_count<15>.Q Inst_timer/msb_count<1>.CE 5.600
Inst_timer/lsb_count<15>.Q Inst_timer/msb_count<2>.CE 5.600
Inst_timer/lsb_count<15>.Q Inst_timer/msb_count<3>.CE 5.600
Inst_timer/lsb_count<15>.Q Inst_timer/msb_count<4>.CE 5.600
Inst_timer/lsb_count<15>.Q Inst_timer/msb_count<5>.CE 5.600
Inst_timer/lsb_count<15>.Q Inst_timer/msb_count<6>.CE 5.600
Inst_timer/lsb_count<15>.Q Inst_timer/msb_count<7>.CE 5.600
Inst_timer/lsb_count<15>.Q Inst_timer/msb_count<8>.CE 5.600
Inst_timer/lsb_count<15>.Q Inst_timer/msb_count<9>.CE 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/lsb_count<10>.D 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/lsb_count<11>.D 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/lsb_count<12>.D 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/lsb_count<13>.D 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/lsb_count<14>.D 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/lsb_count<15>.D 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/lsb_count<2>.D 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/lsb_count<3>.D 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/lsb_count<4>.D 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/lsb_count<5>.D 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/lsb_count<6>.D 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/lsb_count<7>.D 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/lsb_count<8>.D 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/lsb_count<9>.D 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/msb_count<0>.CE 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/msb_count<10>.CE 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/msb_count<11>.CE 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/msb_count<12>.CE 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/msb_count<13>.CE 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/msb_count<14>.CE 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/msb_count<15>.CE 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/msb_count<1>.CE 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/msb_count<2>.CE 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/msb_count<3>.CE 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/msb_count<4>.CE 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/msb_count<5>.CE 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/msb_count<6>.CE 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/msb_count<7>.CE 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/msb_count<8>.CE 5.600
Inst_timer/lsb_count<1>.Q Inst_timer/msb_count<9>.CE 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/lsb_count<10>.D 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/lsb_count<11>.D 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/lsb_count<12>.D 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/lsb_count<13>.D 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/lsb_count<14>.D 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/lsb_count<15>.D 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/lsb_count<3>.D 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/lsb_count<4>.D 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/lsb_count<5>.D 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/lsb_count<6>.D 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/lsb_count<7>.D 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/lsb_count<8>.D 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/lsb_count<9>.D 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/msb_count<0>.CE 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/msb_count<10>.CE 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/msb_count<11>.CE 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/msb_count<12>.CE 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/msb_count<13>.CE 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/msb_count<14>.CE 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/msb_count<15>.CE 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/msb_count<1>.CE 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/msb_count<2>.CE 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/msb_count<3>.CE 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/msb_count<4>.CE 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/msb_count<5>.CE 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/msb_count<6>.CE 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/msb_count<7>.CE 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/msb_count<8>.CE 5.600
Inst_timer/lsb_count<2>.Q Inst_timer/msb_count<9>.CE 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/lsb_count<10>.D 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/lsb_count<11>.D 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/lsb_count<12>.D 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/lsb_count<13>.D 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/lsb_count<14>.D 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/lsb_count<15>.D 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/lsb_count<4>.D 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/lsb_count<5>.D 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/lsb_count<6>.D 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/lsb_count<7>.D 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/lsb_count<8>.D 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/lsb_count<9>.D 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/msb_count<0>.CE 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/msb_count<10>.CE 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/msb_count<11>.CE 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/msb_count<12>.CE 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/msb_count<13>.CE 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/msb_count<14>.CE 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/msb_count<15>.CE 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/msb_count<1>.CE 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/msb_count<2>.CE 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/msb_count<3>.CE 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/msb_count<4>.CE 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/msb_count<5>.CE 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/msb_count<6>.CE 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/msb_count<7>.CE 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/msb_count<8>.CE 5.600
Inst_timer/lsb_count<3>.Q Inst_timer/msb_count<9>.CE 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/lsb_count<10>.D 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/lsb_count<11>.D 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/lsb_count<12>.D 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/lsb_count<13>.D 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/lsb_count<14>.D 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/lsb_count<15>.D 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/lsb_count<5>.D 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/lsb_count<6>.D 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/lsb_count<7>.D 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/lsb_count<8>.D 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/lsb_count<9>.D 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/msb_count<0>.CE 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/msb_count<10>.CE 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/msb_count<11>.CE 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/msb_count<12>.CE 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/msb_count<13>.CE 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/msb_count<14>.CE 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/msb_count<15>.CE 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/msb_count<1>.CE 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/msb_count<2>.CE 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/msb_count<3>.CE 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/msb_count<4>.CE 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/msb_count<5>.CE 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/msb_count<6>.CE 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/msb_count<7>.CE 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/msb_count<8>.CE 5.600
Inst_timer/lsb_count<4>.Q Inst_timer/msb_count<9>.CE 5.600
Inst_timer/lsb_count<5>.Q Inst_timer/lsb_count<10>.D 5.600
Inst_timer/lsb_count<5>.Q Inst_timer/lsb_count<11>.D 5.600
Inst_timer/lsb_count<5>.Q Inst_timer/lsb_count<12>.D 5.600
Inst_timer/lsb_count<5>.Q Inst_timer/lsb_count<13>.D 5.600
Inst_timer/lsb_count<5>.Q Inst_timer/lsb_count<14>.D 5.600
Inst_timer/lsb_count<5>.Q Inst_timer/lsb_count<15>.D 5.600
Inst_timer/lsb_count<5>.Q Inst_timer/lsb_count<6>.D 5.600
Inst_timer/lsb_count<5>.Q Inst_timer/lsb_count<7>.D 5.600
Inst_timer/lsb_count<5>.Q Inst_timer/lsb_count<8>.D 5.600
Inst_timer/lsb_count<5>.Q Inst_timer/lsb_count<9>.D 5.600
Inst_timer/lsb_count<5>.Q Inst_timer/msb_count<0>.CE 5.600
Inst_timer/lsb_count<5>.Q Inst_timer/msb_count<10>.CE 5.600
Inst_timer/lsb_count<5>.Q Inst_timer/msb_count<11>.CE 5.600
Inst_timer/lsb_count<5>.Q Inst_timer/msb_count<12>.CE 5.600
Inst_timer/lsb_count<5>.Q Inst_timer/msb_count<13>.CE 5.600
Inst_timer/lsb_count<5>.Q Inst_timer/msb_count<14>.CE 5.600
Inst_timer/lsb_count<5>.Q Inst_timer/msb_count<15>.CE 5.600
Inst_timer/lsb_count<5>.Q Inst_timer/msb_count<1>.CE 5.600
Inst_timer/lsb_count<5>.Q Inst_timer/msb_count<2>.CE 5.600
Inst_timer/lsb_count<5>.Q Inst_timer/msb_count<3>.CE 5.600
Inst_timer/lsb_count<5>.Q Inst_timer/msb_count<4>.CE 5.600
Inst_timer/lsb_count<5>.Q Inst_timer/msb_count<5>.CE 5.600
Inst_timer/lsb_count<5>.Q Inst_timer/msb_count<6>.CE 5.600
Inst_timer/lsb_count<5>.Q Inst_timer/msb_count<7>.CE 5.600
Inst_timer/lsb_count<5>.Q Inst_timer/msb_count<8>.CE 5.600
Inst_timer/lsb_count<5>.Q Inst_timer/msb_count<9>.CE 5.600
Inst_timer/lsb_count<6>.Q Inst_timer/lsb_count<10>.D 5.600
Inst_timer/lsb_count<6>.Q Inst_timer/lsb_count<11>.D 5.600
Inst_timer/lsb_count<6>.Q Inst_timer/lsb_count<12>.D 5.600
Inst_timer/lsb_count<6>.Q Inst_timer/lsb_count<13>.D 5.600
Inst_timer/lsb_count<6>.Q Inst_timer/lsb_count<14>.D 5.600
Inst_timer/lsb_count<6>.Q Inst_timer/lsb_count<15>.D 5.600
Inst_timer/lsb_count<6>.Q Inst_timer/lsb_count<7>.D 5.600
Inst_timer/lsb_count<6>.Q Inst_timer/lsb_count<8>.D 5.600
Inst_timer/lsb_count<6>.Q Inst_timer/lsb_count<9>.D 5.600
Inst_timer/lsb_count<6>.Q Inst_timer/msb_count<0>.CE 5.600
Inst_timer/lsb_count<6>.Q Inst_timer/msb_count<10>.CE 5.600
Inst_timer/lsb_count<6>.Q Inst_timer/msb_count<11>.CE 5.600
Inst_timer/lsb_count<6>.Q Inst_timer/msb_count<12>.CE 5.600
Inst_timer/lsb_count<6>.Q Inst_timer/msb_count<13>.CE 5.600
Inst_timer/lsb_count<6>.Q Inst_timer/msb_count<14>.CE 5.600
Inst_timer/lsb_count<6>.Q Inst_timer/msb_count<15>.CE 5.600
Inst_timer/lsb_count<6>.Q Inst_timer/msb_count<1>.CE 5.600
Inst_timer/lsb_count<6>.Q Inst_timer/msb_count<2>.CE 5.600
Inst_timer/lsb_count<6>.Q Inst_timer/msb_count<3>.CE 5.600
Inst_timer/lsb_count<6>.Q Inst_timer/msb_count<4>.CE 5.600
Inst_timer/lsb_count<6>.Q Inst_timer/msb_count<5>.CE 5.600
Inst_timer/lsb_count<6>.Q Inst_timer/msb_count<6>.CE 5.600
Inst_timer/lsb_count<6>.Q Inst_timer/msb_count<7>.CE 5.600
Inst_timer/lsb_count<6>.Q Inst_timer/msb_count<8>.CE 5.600
Inst_timer/lsb_count<6>.Q Inst_timer/msb_count<9>.CE 5.600
Inst_timer/lsb_count<7>.Q Inst_timer/lsb_count<10>.D 5.600
Inst_timer/lsb_count<7>.Q Inst_timer/lsb_count<11>.D 5.600
Inst_timer/lsb_count<7>.Q Inst_timer/lsb_count<12>.D 5.600
Inst_timer/lsb_count<7>.Q Inst_timer/lsb_count<13>.D 5.600
Inst_timer/lsb_count<7>.Q Inst_timer/lsb_count<14>.D 5.600
Inst_timer/lsb_count<7>.Q Inst_timer/lsb_count<15>.D 5.600
Inst_timer/lsb_count<7>.Q Inst_timer/lsb_count<8>.D 5.600
Inst_timer/lsb_count<7>.Q Inst_timer/lsb_count<9>.D 5.600
Inst_timer/lsb_count<7>.Q Inst_timer/msb_count<0>.CE 5.600
Inst_timer/lsb_count<7>.Q Inst_timer/msb_count<10>.CE 5.600
Inst_timer/lsb_count<7>.Q Inst_timer/msb_count<11>.CE 5.600
Inst_timer/lsb_count<7>.Q Inst_timer/msb_count<12>.CE 5.600
Inst_timer/lsb_count<7>.Q Inst_timer/msb_count<13>.CE 5.600
Inst_timer/lsb_count<7>.Q Inst_timer/msb_count<14>.CE 5.600
Inst_timer/lsb_count<7>.Q Inst_timer/msb_count<15>.CE 5.600
Inst_timer/lsb_count<7>.Q Inst_timer/msb_count<1>.CE 5.600
Inst_timer/lsb_count<7>.Q Inst_timer/msb_count<2>.CE 5.600
Inst_timer/lsb_count<7>.Q Inst_timer/msb_count<3>.CE 5.600
Inst_timer/lsb_count<7>.Q Inst_timer/msb_count<4>.CE 5.600
Inst_timer/lsb_count<7>.Q Inst_timer/msb_count<5>.CE 5.600
Inst_timer/lsb_count<7>.Q Inst_timer/msb_count<6>.CE 5.600
Inst_timer/lsb_count<7>.Q Inst_timer/msb_count<7>.CE 5.600
Inst_timer/lsb_count<7>.Q Inst_timer/msb_count<8>.CE 5.600
Inst_timer/lsb_count<7>.Q Inst_timer/msb_count<9>.CE 5.600
Inst_timer/lsb_count<8>.Q Inst_timer/lsb_count<10>.D 5.600
Inst_timer/lsb_count<8>.Q Inst_timer/lsb_count<11>.D 5.600
Inst_timer/lsb_count<8>.Q Inst_timer/lsb_count<12>.D 5.600
Inst_timer/lsb_count<8>.Q Inst_timer/lsb_count<13>.D 5.600
Inst_timer/lsb_count<8>.Q Inst_timer/lsb_count<14>.D 5.600
Inst_timer/lsb_count<8>.Q Inst_timer/lsb_count<15>.D 5.600
Inst_timer/lsb_count<8>.Q Inst_timer/lsb_count<9>.D 5.600
Inst_timer/lsb_count<8>.Q Inst_timer/msb_count<0>.CE 5.600
Inst_timer/lsb_count<8>.Q Inst_timer/msb_count<10>.CE 5.600
Inst_timer/lsb_count<8>.Q Inst_timer/msb_count<11>.CE 5.600
Inst_timer/lsb_count<8>.Q Inst_timer/msb_count<12>.CE 5.600
Inst_timer/lsb_count<8>.Q Inst_timer/msb_count<13>.CE 5.600
Inst_timer/lsb_count<8>.Q Inst_timer/msb_count<14>.CE 5.600
Inst_timer/lsb_count<8>.Q Inst_timer/msb_count<15>.CE 5.600
Inst_timer/lsb_count<8>.Q Inst_timer/msb_count<1>.CE 5.600
Inst_timer/lsb_count<8>.Q Inst_timer/msb_count<2>.CE 5.600
Inst_timer/lsb_count<8>.Q Inst_timer/msb_count<3>.CE 5.600
Inst_timer/lsb_count<8>.Q Inst_timer/msb_count<4>.CE 5.600
Inst_timer/lsb_count<8>.Q Inst_timer/msb_count<5>.CE 5.600
Inst_timer/lsb_count<8>.Q Inst_timer/msb_count<6>.CE 5.600
Inst_timer/lsb_count<8>.Q Inst_timer/msb_count<7>.CE 5.600
Inst_timer/lsb_count<8>.Q Inst_timer/msb_count<8>.CE 5.600
Inst_timer/lsb_count<8>.Q Inst_timer/msb_count<9>.CE 5.600
Inst_timer/lsb_count<9>.Q Inst_timer/lsb_count<10>.D 5.600
Inst_timer/lsb_count<9>.Q Inst_timer/lsb_count<11>.D 5.600
Inst_timer/lsb_count<9>.Q Inst_timer/lsb_count<12>.D 5.600
Inst_timer/lsb_count<9>.Q Inst_timer/lsb_count<13>.D 5.600
Inst_timer/lsb_count<9>.Q Inst_timer/lsb_count<14>.D 5.600
Inst_timer/lsb_count<9>.Q Inst_timer/lsb_count<15>.D 5.600
Inst_timer/lsb_count<9>.Q Inst_timer/msb_count<0>.CE 5.600
Inst_timer/lsb_count<9>.Q Inst_timer/msb_count<10>.CE 5.600
Inst_timer/lsb_count<9>.Q Inst_timer/msb_count<11>.CE 5.600
Inst_timer/lsb_count<9>.Q Inst_timer/msb_count<12>.CE 5.600
Inst_timer/lsb_count<9>.Q Inst_timer/msb_count<13>.CE 5.600
Inst_timer/lsb_count<9>.Q Inst_timer/msb_count<14>.CE 5.600
Inst_timer/lsb_count<9>.Q Inst_timer/msb_count<15>.CE 5.600
Inst_timer/lsb_count<9>.Q Inst_timer/msb_count<1>.CE 5.600
Inst_timer/lsb_count<9>.Q Inst_timer/msb_count<2>.CE 5.600
Inst_timer/lsb_count<9>.Q Inst_timer/msb_count<3>.CE 5.600
Inst_timer/lsb_count<9>.Q Inst_timer/msb_count<4>.CE 5.600
Inst_timer/lsb_count<9>.Q Inst_timer/msb_count<5>.CE 5.600
Inst_timer/lsb_count<9>.Q Inst_timer/msb_count<6>.CE 5.600
Inst_timer/lsb_count<9>.Q Inst_timer/msb_count<7>.CE 5.600
Inst_timer/lsb_count<9>.Q Inst_timer/msb_count<8>.CE 5.600
Inst_timer/lsb_count<9>.Q Inst_timer/msb_count<9>.CE 5.600
Inst_timer/msb_count<0>.Q Inst_timer/msb_count<10>.D 5.600
Inst_timer/msb_count<0>.Q Inst_timer/msb_count<11>.D 5.600
Inst_timer/msb_count<0>.Q Inst_timer/msb_count<12>.D 5.600
Inst_timer/msb_count<0>.Q Inst_timer/msb_count<13>.D 5.600
Inst_timer/msb_count<0>.Q Inst_timer/msb_count<14>.D 5.600
Inst_timer/msb_count<0>.Q Inst_timer/msb_count<15>.D 5.600
Inst_timer/msb_count<0>.Q Inst_timer/msb_count<1>.D 5.600
Inst_timer/msb_count<0>.Q Inst_timer/msb_count<2>.D 5.600
Inst_timer/msb_count<0>.Q Inst_timer/msb_count<3>.D 5.600
Inst_timer/msb_count<0>.Q Inst_timer/msb_count<4>.D 5.600
Inst_timer/msb_count<0>.Q Inst_timer/msb_count<5>.D 5.600
Inst_timer/msb_count<0>.Q Inst_timer/msb_count<6>.D 5.600
Inst_timer/msb_count<0>.Q Inst_timer/msb_count<7>.D 5.600
Inst_timer/msb_count<0>.Q Inst_timer/msb_count<8>.D 5.600
Inst_timer/msb_count<0>.Q Inst_timer/msb_count<9>.D 5.600
Inst_timer/msb_count<10>.Q Inst_timer/msb_count<11>.D 5.600
Inst_timer/msb_count<10>.Q Inst_timer/msb_count<12>.D 5.600
Inst_timer/msb_count<10>.Q Inst_timer/msb_count<13>.D 5.600
Inst_timer/msb_count<10>.Q Inst_timer/msb_count<14>.D 5.600
Inst_timer/msb_count<10>.Q Inst_timer/msb_count<15>.D 5.600
Inst_timer/msb_count<11>.Q Inst_timer/msb_count<12>.D 5.600
Inst_timer/msb_count<11>.Q Inst_timer/msb_count<13>.D 5.600
Inst_timer/msb_count<11>.Q Inst_timer/msb_count<14>.D 5.600
Inst_timer/msb_count<11>.Q Inst_timer/msb_count<15>.D 5.600
Inst_timer/msb_count<12>.Q Inst_timer/msb_count<13>.D 5.600
Inst_timer/msb_count<12>.Q Inst_timer/msb_count<14>.D 5.600
Inst_timer/msb_count<12>.Q Inst_timer/msb_count<15>.D 5.600
Inst_timer/msb_count<13>.Q Inst_timer/msb_count<14>.D 5.600
Inst_timer/msb_count<13>.Q Inst_timer/msb_count<15>.D 5.600
Inst_timer/msb_count<14>.Q Inst_timer/msb_count<15>.D 5.600
Inst_timer/msb_count<1>.Q Inst_timer/msb_count<10>.D 5.600
Inst_timer/msb_count<1>.Q Inst_timer/msb_count<11>.D 5.600
Inst_timer/msb_count<1>.Q Inst_timer/msb_count<12>.D 5.600
Inst_timer/msb_count<1>.Q Inst_timer/msb_count<13>.D 5.600
Inst_timer/msb_count<1>.Q Inst_timer/msb_count<14>.D 5.600
Inst_timer/msb_count<1>.Q Inst_timer/msb_count<15>.D 5.600
Inst_timer/msb_count<1>.Q Inst_timer/msb_count<2>.D 5.600
Inst_timer/msb_count<1>.Q Inst_timer/msb_count<3>.D 5.600
Inst_timer/msb_count<1>.Q Inst_timer/msb_count<4>.D 5.600
Inst_timer/msb_count<1>.Q Inst_timer/msb_count<5>.D 5.600
Inst_timer/msb_count<1>.Q Inst_timer/msb_count<6>.D 5.600
Inst_timer/msb_count<1>.Q Inst_timer/msb_count<7>.D 5.600
Inst_timer/msb_count<1>.Q Inst_timer/msb_count<8>.D 5.600
Inst_timer/msb_count<1>.Q Inst_timer/msb_count<9>.D 5.600
Inst_timer/msb_count<2>.Q Inst_timer/msb_count<10>.D 5.600
Inst_timer/msb_count<2>.Q Inst_timer/msb_count<11>.D 5.600
Inst_timer/msb_count<2>.Q Inst_timer/msb_count<12>.D 5.600
Inst_timer/msb_count<2>.Q Inst_timer/msb_count<13>.D 5.600
Inst_timer/msb_count<2>.Q Inst_timer/msb_count<14>.D 5.600
Inst_timer/msb_count<2>.Q Inst_timer/msb_count<15>.D 5.600
Inst_timer/msb_count<2>.Q Inst_timer/msb_count<3>.D 5.600
Inst_timer/msb_count<2>.Q Inst_timer/msb_count<4>.D 5.600
Inst_timer/msb_count<2>.Q Inst_timer/msb_count<5>.D 5.600
Inst_timer/msb_count<2>.Q Inst_timer/msb_count<6>.D 5.600
Inst_timer/msb_count<2>.Q Inst_timer/msb_count<7>.D 5.600
Inst_timer/msb_count<2>.Q Inst_timer/msb_count<8>.D 5.600
Inst_timer/msb_count<2>.Q Inst_timer/msb_count<9>.D 5.600
Inst_timer/msb_count<3>.Q Inst_timer/msb_count<10>.D 5.600
Inst_timer/msb_count<3>.Q Inst_timer/msb_count<11>.D 5.600
Inst_timer/msb_count<3>.Q Inst_timer/msb_count<12>.D 5.600
Inst_timer/msb_count<3>.Q Inst_timer/msb_count<13>.D 5.600
Inst_timer/msb_count<3>.Q Inst_timer/msb_count<14>.D 5.600
Inst_timer/msb_count<3>.Q Inst_timer/msb_count<15>.D 5.600
Inst_timer/msb_count<3>.Q Inst_timer/msb_count<4>.D 5.600
Inst_timer/msb_count<3>.Q Inst_timer/msb_count<5>.D 5.600
Inst_timer/msb_count<3>.Q Inst_timer/msb_count<6>.D 5.600
Inst_timer/msb_count<3>.Q Inst_timer/msb_count<7>.D 5.600
Inst_timer/msb_count<3>.Q Inst_timer/msb_count<8>.D 5.600
Inst_timer/msb_count<3>.Q Inst_timer/msb_count<9>.D 5.600
Inst_timer/msb_count<4>.Q Inst_timer/msb_count<10>.D 5.600
Inst_timer/msb_count<4>.Q Inst_timer/msb_count<11>.D 5.600
Inst_timer/msb_count<4>.Q Inst_timer/msb_count<12>.D 5.600
Inst_timer/msb_count<4>.Q Inst_timer/msb_count<13>.D 5.600
Inst_timer/msb_count<4>.Q Inst_timer/msb_count<14>.D 5.600
Inst_timer/msb_count<4>.Q Inst_timer/msb_count<15>.D 5.600
Inst_timer/msb_count<4>.Q Inst_timer/msb_count<5>.D 5.600
Inst_timer/msb_count<4>.Q Inst_timer/msb_count<6>.D 5.600
Inst_timer/msb_count<4>.Q Inst_timer/msb_count<7>.D 5.600
Inst_timer/msb_count<4>.Q Inst_timer/msb_count<8>.D 5.600
Inst_timer/msb_count<4>.Q Inst_timer/msb_count<9>.D 5.600
Inst_timer/msb_count<5>.Q Inst_timer/msb_count<10>.D 5.600
Inst_timer/msb_count<5>.Q Inst_timer/msb_count<11>.D 5.600
Inst_timer/msb_count<5>.Q Inst_timer/msb_count<12>.D 5.600
Inst_timer/msb_count<5>.Q Inst_timer/msb_count<13>.D 5.600
Inst_timer/msb_count<5>.Q Inst_timer/msb_count<14>.D 5.600
Inst_timer/msb_count<5>.Q Inst_timer/msb_count<15>.D 5.600
Inst_timer/msb_count<5>.Q Inst_timer/msb_count<6>.D 5.600
Inst_timer/msb_count<5>.Q Inst_timer/msb_count<7>.D 5.600
Inst_timer/msb_count<5>.Q Inst_timer/msb_count<8>.D 5.600
Inst_timer/msb_count<5>.Q Inst_timer/msb_count<9>.D 5.600
Inst_timer/msb_count<6>.Q Inst_timer/msb_count<10>.D 5.600
Inst_timer/msb_count<6>.Q Inst_timer/msb_count<11>.D 5.600
Inst_timer/msb_count<6>.Q Inst_timer/msb_count<12>.D 5.600
Inst_timer/msb_count<6>.Q Inst_timer/msb_count<13>.D 5.600
Inst_timer/msb_count<6>.Q Inst_timer/msb_count<14>.D 5.600
Inst_timer/msb_count<6>.Q Inst_timer/msb_count<15>.D 5.600
Inst_timer/msb_count<6>.Q Inst_timer/msb_count<7>.D 5.600
Inst_timer/msb_count<6>.Q Inst_timer/msb_count<8>.D 5.600
Inst_timer/msb_count<6>.Q Inst_timer/msb_count<9>.D 5.600
Inst_timer/msb_count<7>.Q Inst_timer/msb_count<10>.D 5.600
Inst_timer/msb_count<7>.Q Inst_timer/msb_count<11>.D 5.600
Inst_timer/msb_count<7>.Q Inst_timer/msb_count<12>.D 5.600
Inst_timer/msb_count<7>.Q Inst_timer/msb_count<13>.D 5.600
Inst_timer/msb_count<7>.Q Inst_timer/msb_count<14>.D 5.600
Inst_timer/msb_count<7>.Q Inst_timer/msb_count<15>.D 5.600
Inst_timer/msb_count<7>.Q Inst_timer/msb_count<8>.D 5.600
Inst_timer/msb_count<7>.Q Inst_timer/msb_count<9>.D 5.600
Inst_timer/msb_count<8>.Q Inst_timer/msb_count<10>.D 5.600
Inst_timer/msb_count<8>.Q Inst_timer/msb_count<11>.D 5.600
Inst_timer/msb_count<8>.Q Inst_timer/msb_count<12>.D 5.600
Inst_timer/msb_count<8>.Q Inst_timer/msb_count<13>.D 5.600
Inst_timer/msb_count<8>.Q Inst_timer/msb_count<14>.D 5.600
Inst_timer/msb_count<8>.Q Inst_timer/msb_count<15>.D 5.600
Inst_timer/msb_count<8>.Q Inst_timer/msb_count<9>.D 5.600
Inst_timer/msb_count<9>.Q Inst_timer/msb_count<10>.D 5.600
Inst_timer/msb_count<9>.Q Inst_timer/msb_count<11>.D 5.600
Inst_timer/msb_count<9>.Q Inst_timer/msb_count<12>.D 5.600
Inst_timer/msb_count<9>.Q Inst_timer/msb_count<13>.D 5.600
Inst_timer/msb_count<9>.Q Inst_timer/msb_count<14>.D 5.600
Inst_timer/msb_count<9>.Q Inst_timer/msb_count<15>.D 5.600


Pad to Pad List

Source Pad Destination Pad Delay
chnid data_out<10> 5.700
chnid data_out<9> 5.700
dwc data_out<10> 5.700
dwc data_out<9> 5.700
header data_out<10> 5.700
header data_out<9> 5.700
ndwc data_out<10> 5.700
ndwc data_out<9> 5.700
pt<0> data_out<10> 5.700
pt<0> data_out<9> 5.700
pt<1> data_out<9> 5.700
timer_lower data_out<10> 5.700
timer_lower data_out<9> 5.700
timer_upper data_out<10> 5.700
timer_upper data_out<9> 5.700
timersel data_out<10> 5.700
timersel data_out<9> 5.700
channel<0> data_out<0> 5.000
channel<1> data_out<1> 5.000
chnid data_out<0> 5.000
chnid data_out<11> 5.000
chnid data_out<12> 5.000
chnid data_out<13> 5.000
chnid data_out<14> 5.000
chnid data_out<15> 5.000
chnid data_out<1> 5.000
chnid data_out<2> 5.000
chnid data_out<3> 5.000
chnid data_out<4> 5.000
chnid data_out<5> 5.000
chnid data_out<6> 5.000
chnid data_out<7> 5.000
chnid data_out<8> 5.000
dr<0> data_out<12> 5.000
dr<1> data_out<13> 5.000
dwc data_out<11> 5.000
dwc data_out<2> 5.000
dwc data_out<4> 5.000
dwc data_out<5> 5.000
dwc data_out<6> 5.000
dwc data_out<7> 5.000
dwc data_out<8> 5.000
header data_out<0> 5.000
header data_out<11> 5.000
header data_out<12> 5.000
header data_out<13> 5.000
header data_out<14> 5.000
header data_out<15> 5.000
header data_out<1> 5.000
header data_out<2> 5.000
header data_out<3> 5.000
header data_out<4> 5.000
header data_out<5> 5.000
header data_out<6> 5.000
header data_out<7> 5.000
header data_out<8> 5.000
module<0> data_out<2> 5.000
module<1> data_out<3> 5.000
module<2> data_out<4> 5.000
module<3> data_out<5> 5.000
module<4> data_out<6> 5.000
module<5> data_out<7> 5.000
module<6> data_out<8> 5.000
module<7> data_out<9> 5.000
ndwc data_out<11> 5.000
ndwc data_out<2> 5.000
ndwc data_out<4> 5.000
ndwc data_out<5> 5.000
ndwc data_out<6> 5.000
ndwc data_out<7> 5.000
ndwc data_out<8> 5.000
pt<1> data_out<10> 5.000
pt<1> data_out<11> 5.000
timer_lower data_out<0> 5.000
timer_lower data_out<11> 5.000
timer_lower data_out<12> 5.000
timer_lower data_out<13> 5.000
timer_lower data_out<14> 5.000
timer_lower data_out<15> 5.000
timer_lower data_out<1> 5.000
timer_lower data_out<2> 5.000
timer_lower data_out<3> 5.000
timer_lower data_out<4> 5.000
timer_lower data_out<5> 5.000
timer_lower data_out<6> 5.000
timer_lower data_out<7> 5.000
timer_lower data_out<8> 5.000
timer_upper data_out<0> 5.000
timer_upper data_out<11> 5.000
timer_upper data_out<12> 5.000
timer_upper data_out<13> 5.000
timer_upper data_out<14> 5.000
timer_upper data_out<15> 5.000
timer_upper data_out<1> 5.000
timer_upper data_out<2> 5.000
timer_upper data_out<3> 5.000
timer_upper data_out<4> 5.000
timer_upper data_out<5> 5.000
timer_upper data_out<6> 5.000
timer_upper data_out<7> 5.000
timer_upper data_out<8> 5.000
timersel data_out<0> 5.000
timersel data_out<11> 5.000
timersel data_out<12> 5.000
timersel data_out<13> 5.000
timersel data_out<14> 5.000
timersel data_out<15> 5.000
timersel data_out<1> 5.000
timersel data_out<2> 5.000
timersel data_out<3> 5.000
timersel data_out<4> 5.000
timersel data_out<5> 5.000
timersel data_out<6> 5.000
timersel data_out<7> 5.000
timersel data_out<8> 5.000


Number of paths analyzed: 725
Number of Timing errors: 725
Analysis Completed: Tue Aug 08 14:16:31 2006