cpldfit: version I.32 Xilinx Inc.
Fitter Report
Design Name: addrtime_ctrl Date: 8- 8-2006, 2:16PM
Device Used: XC95144XL-5-TQ100
Fitting Status: Successful
************************* Mapped Resource Summary **************************
Macrocells Product Terms Function Block Registers Pins
Used/Tot Used/Tot Inps Used/Tot Used/Tot Used/Tot
81 /144 ( 56%) 206 /720 ( 29%) 139/432 ( 32%) 64 /144 ( 44%) 42 /81 ( 52%)
** Function Block Resources **
Function Mcells FB Inps Pterms IO
Block Used/Tot Used/Tot Used/Tot Used/Tot
FB1 18/18* 32/54 51/90 0/11
FB2 18/18* 15/54 36/90 0/10
FB3 18/18* 19/54 36/90 0/10
FB4 9/18 34/54 35/90 9/10
FB5 5/18 7/54 9/90 0/10
FB6 13/18 32/54 39/90 7/10
FB7 0/18 0/54 0/90 0/10
FB8 0/18 0/54 0/90 0/10
----- ----- ----- -----
81/144 139/432 206/720 16/81
* - Resource is exhausted
** Global Control Resources **
Signal 'acqclk' mapped onto global clock net GCK1.
Signal 'timeclk' mapped onto global clock net GCK2.
Global output enable net(s) unused.
Signal 'reset' mapped onto global set/reset net GSR.
** Pin Resources **
Signal Type Required Mapped | Pin Type Used Total
------------------------------------|------------------------------------
Input : 23 23 | I/O : 39 73
Output : 16 16 | GCK/IO : 2 3
Bidirectional : 0 0 | GTS/IO : 0 4
GCK : 2 2 | GSR/IO : 1 1
GTS : 0 0 |
GSR : 1 1 |
---- ----
Total 42 42
** Power Data **
There are 81 macrocells in high performance mode (MCHP).
There are 0 macrocells in low power mode (MCLP).
End of Mapped Resource Summary
************************* Summary of Mapped Logic ************************
** 16 Outputs **
Signal Total Total Loc Pin Pin Pin Pwr Slew Reg Init
Name Pts Inps No. Type Use Mode Rate State
data_out<8> 4 10 FB4_2 87 I/O O STD FAST
data_out<7> 4 10 FB4_5 89 I/O O STD FAST
data_out<6> 4 10 FB4_6 90 I/O O STD FAST
data_out<5> 4 10 FB4_8 91 I/O O STD FAST
data_out<4> 4 10 FB4_9 92 I/O O STD FAST
data_out<3> 4 8 FB4_11 93 I/O O STD FAST
data_out<2> 5 10 FB4_12 94 I/O O STD FAST
data_out<1> 3 8 FB4_14 95 I/O O STD FAST
data_out<0> 3 8 FB4_15 96 I/O O STD FAST
data_out<15> 2 7 FB6_8 78 I/O O STD FAST
data_out<14> 2 7 FB6_9 79 I/O O STD FAST
data_out<13> 3 8 FB6_11 80 I/O O STD FAST
data_out<12> 3 8 FB6_12 81 I/O O STD FAST
data_out<11> 5 10 FB6_14 82 I/O O STD FAST
data_out<10> 6 11 FB6_15 85 I/O O STD FAST
data_out<9> 7 12 FB6_17 86 I/O O STD FAST
** 65 Buried Nodes **
Signal Total Total Loc Pwr Reg Init
Name Pts Inps Mode State
Inst_timer/msb_count<0> 2 17 FB1_1 STD RESET
Inst_timer/lsb_count<15> 2 16 FB1_2 STD RESET
Inst_timer/lsb_count<14> 2 15 FB1_3 STD RESET
Inst_timer/msb_count<9> 3 26 FB1_4 STD RESET
Inst_timer/msb_count<8> 3 25 FB1_5 STD RESET
Inst_timer/msb_count<7> 3 24 FB1_6 STD RESET
Inst_timer/msb_count<6> 3 23 FB1_7 STD RESET
Inst_timer/msb_count<5> 3 22 FB1_8 STD RESET
Inst_timer/msb_count<4> 3 21 FB1_9 STD RESET
Inst_timer/msb_count<3> 3 20 FB1_10 STD RESET
Inst_timer/msb_count<2> 3 19 FB1_11 STD RESET
Inst_timer/msb_count<1> 3 18 FB1_12 STD RESET
Inst_timer/msb_count<15> 3 32 FB1_13 STD RESET
Inst_timer/msb_count<14> 3 31 FB1_14 STD RESET
Inst_timer/msb_count<13> 3 30 FB1_15 STD RESET
Inst_timer/msb_count<12> 3 29 FB1_16 STD RESET
Inst_timer/msb_count<11> 3 28 FB1_17 STD RESET
Inst_timer/msb_count<10> 3 27 FB1_18 STD RESET
lsb_sig<6> 2 2 FB2_1 STD RESET
lsb_sig<5> 2 2 FB2_2 STD RESET
lsb_sig<4> 2 2 FB2_3 STD RESET
lsb_sig<3> 2 2 FB2_4 STD RESET
lsb_sig<2> 2 2 FB2_5 STD RESET
lsb_sig<1> 2 2 FB2_6 STD RESET
lsb_sig<12> 2 2 FB2_7 STD RESET
lsb_sig<11> 2 2 FB2_8 STD RESET
lsb_sig<10> 2 2 FB2_9 STD RESET
lsb_sig<0> 2 2 FB2_10 STD RESET
Inst_timer/lsb_count<9> 2 10 FB2_11 STD RESET
Inst_timer/lsb_count<8> 2 9 FB2_12 STD RESET
Inst_timer/lsb_count<7> 2 8 FB2_13 STD RESET
Inst_timer/lsb_count<6> 2 7 FB2_14 STD RESET
Inst_timer/lsb_count<13> 2 14 FB2_15 STD RESET
Inst_timer/lsb_count<12> 2 13 FB2_16 STD RESET
Inst_timer/lsb_count<11> 2 12 FB2_17 STD RESET
Inst_timer/lsb_count<10> 2 11 FB2_18 STD RESET
msb_sig<5> 2 2 FB3_1 STD RESET
msb_sig<4> 2 2 FB3_2 STD RESET
msb_sig<3> 2 2 FB3_3 STD RESET
msb_sig<2> 2 2 FB3_4 STD RESET
Signal Total Total Loc Pwr Reg Init
Name Pts Inps Mode State
msb_sig<1> 2 2 FB3_5 STD RESET
msb_sig<15> 2 2 FB3_6 STD RESET
msb_sig<14> 2 2 FB3_7 STD RESET
msb_sig<13> 2 2 FB3_8 STD RESET
msb_sig<12> 2 2 FB3_9 STD RESET
msb_sig<11> 2 2 FB3_10 STD RESET
msb_sig<10> 2 2 FB3_11 STD RESET
msb_sig<0> 2 2 FB3_12 STD RESET
lsb_sig<9> 2 2 FB3_13 STD RESET
lsb_sig<8> 2 2 FB3_14 STD RESET
lsb_sig<7> 2 2 FB3_15 STD RESET
lsb_sig<15> 2 2 FB3_16 STD RESET
lsb_sig<14> 2 2 FB3_17 STD RESET
lsb_sig<13> 2 2 FB3_18 STD RESET
Inst_timer/msb_count<9>/Inst_timer/msb_count<9>_RSTF__$INT 1 2 FB5_14 STD
msb_sig<9> 2 2 FB5_15 STD RESET
msb_sig<8> 2 2 FB5_16 STD RESET
msb_sig<7> 2 2 FB5_17 STD RESET
msb_sig<6> 2 2 FB5_18 STD RESET
Inst_timer/lsb_count<0> 1 1 FB6_6 STD RESET
Inst_timer/lsb_count<5> 2 6 FB6_7 STD RESET
Inst_timer/lsb_count<4> 2 5 FB6_10 STD RESET
Inst_timer/lsb_count<3> 2 4 FB6_13 STD RESET
Inst_timer/lsb_count<2> 2 3 FB6_16 STD RESET
Inst_timer/lsb_count<1> 2 2 FB6_18 STD RESET
** 26 Inputs **
Signal Loc Pin Pin Pin
Name No. Type Use
module<2> FB1_2 11 I/O I
module<1> FB1_3 12 I/O I
module<0> FB1_5 13 I/O I
pt<1> FB1_6 14 I/O I
pt<0> FB1_8 15 I/O I
dr<1> FB1_9 16 I/O I
dr<0> FB1_11 17 I/O I
reset_timer FB1_15 20 I/O I
acqclk FB1_17 22 GCK/I/O GCK
reset FB2_2 99 GSR/I/O GSR/I
module<7> FB2_11 6 I/O I
module<6> FB2_12 7 I/O I
module<5> FB2_14 8 I/O I
module<4> FB2_15 9 I/O I
module<3> FB2_17 10 I/O I
timeclk FB3_2 23 GCK/I/O GCK
latch_en FB3_5 24 I/O I
channel<1> FB5_17 49 I/O I
timersel FB6_2 74 I/O I
channel<0> FB7_2 50 I/O I
ndwc FB8_9 67 I/O I
dwc FB8_11 68 I/O I
timer_lower FB8_12 70 I/O I
timer_upper FB8_14 71 I/O I
chnid FB8_15 72 I/O I
header FB8_17 73 I/O I
Legend:
Pin No. - ~ - User Assigned
************************** Function Block Details ************************
Legend:
Total Pt - Total product terms used by the macrocell signal
Imp Pt - Product terms imported from other macrocells
Exp Pt - Product terms exported to other macrocells
in direction shown
Unused Pt - Unused local product terms remaining in macrocell
Loc - Location where logic was mapped in device
Pin Type/Use - I - Input GCK - Global Clock
O - Output GTS - Global Output Enable
(b) - Buried macrocell GSR - Global Set/Reset
X - Signal used as input to the macrocell logic.
Pin No. - ~ - User Assigned
*********************************** FB1 ***********************************
Number of function block inputs used/remaining: 32/22
Number of signals used by logic mapping into function block: 32
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
Inst_timer/msb_count<0>
2 0 0 3 FB1_1 (b) (b)
Inst_timer/lsb_count<15>
2 0 0 3 FB1_2 11 I/O I
Inst_timer/lsb_count<14>
2 0 0 3 FB1_3 12 I/O I
Inst_timer/msb_count<9>
3 0 0 2 FB1_4 (b) (b)
Inst_timer/msb_count<8>
3 0 0 2 FB1_5 13 I/O I
Inst_timer/msb_count<7>
3 0 0 2 FB1_6 14 I/O I
Inst_timer/msb_count<6>
3 0 0 2 FB1_7 (b) (b)
Inst_timer/msb_count<5>
3 0 0 2 FB1_8 15 I/O I
Inst_timer/msb_count<4>
3 0 0 2 FB1_9 16 I/O I
Inst_timer/msb_count<3>
3 0 0 2 FB1_10 (b) (b)
Inst_timer/msb_count<2>
3 0 0 2 FB1_11 17 I/O I
Inst_timer/msb_count<1>
3 0 0 2 FB1_12 18 I/O (b)
Inst_timer/msb_count<15>
3 0 0 2 FB1_13 (b) (b)
Inst_timer/msb_count<14>
3 0 0 2 FB1_14 19 I/O (b)
Inst_timer/msb_count<13>
3 0 0 2 FB1_15 20 I/O I
Inst_timer/msb_count<12>
3 0 0 2 FB1_16 (b) (b)
Inst_timer/msb_count<11>
3 0 0 2 FB1_17 22 GCK/I/O GCK
Inst_timer/msb_count<10>
3 0 0 2 FB1_18 (b) (b)
Signals Used by Logic in Function Block
1: Inst_timer/lsb_count<0> 12: Inst_timer/lsb_count<5> 23: Inst_timer/msb_count<1>
2: Inst_timer/lsb_count<10> 13: Inst_timer/lsb_count<6> 24: Inst_timer/msb_count<2>
3: Inst_timer/lsb_count<11> 14: Inst_timer/lsb_count<7> 25: Inst_timer/msb_count<3>
4: Inst_timer/lsb_count<12> 15: Inst_timer/lsb_count<8> 26: Inst_timer/msb_count<4>
5: Inst_timer/lsb_count<13> 16: Inst_timer/lsb_count<9> 27: Inst_timer/msb_count<5>
6: Inst_timer/lsb_count<14> 17: Inst_timer/msb_count<0> 28: Inst_timer/msb_count<6>
7: Inst_timer/lsb_count<15> 18: Inst_timer/msb_count<10> 29: Inst_timer/msb_count<7>
8: Inst_timer/lsb_count<1> 19: Inst_timer/msb_count<11> 30: Inst_timer/msb_count<8>
9: Inst_timer/lsb_count<2> 20: Inst_timer/msb_count<12> 31: Inst_timer/msb_count<9>
10: Inst_timer/lsb_count<3> 21: Inst_timer/msb_count<13> 32: Inst_timer/msb_count<9>/Inst_timer/msb_count<9>_RSTF__$INT
11: Inst_timer/lsb_count<4> 22: Inst_timer/msb_count<14>
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
Inst_timer/msb_count<0>
XXXXXXXXXXXXXXXX...............X........ 17
Inst_timer/lsb_count<15>
XXXXXX.XXXXXXXXX...............X........ 16
Inst_timer/lsb_count<14>
XXXXX..XXXXXXXXX...............X........ 15
Inst_timer/msb_count<9>
XXXXXXXXXXXXXXXXX.....XXXXXXXX.X........ 26
Inst_timer/msb_count<8>
XXXXXXXXXXXXXXXXX.....XXXXXXX..X........ 25
Inst_timer/msb_count<7>
XXXXXXXXXXXXXXXXX.....XXXXXX...X........ 24
Inst_timer/msb_count<6>
XXXXXXXXXXXXXXXXX.....XXXXX....X........ 23
Inst_timer/msb_count<5>
XXXXXXXXXXXXXXXXX.....XXXX.....X........ 22
Inst_timer/msb_count<4>
XXXXXXXXXXXXXXXXX.....XXX......X........ 21
Inst_timer/msb_count<3>
XXXXXXXXXXXXXXXXX.....XX.......X........ 20
Inst_timer/msb_count<2>
XXXXXXXXXXXXXXXXX.....X........X........ 19
Inst_timer/msb_count<1>
XXXXXXXXXXXXXXXXX..............X........ 18
Inst_timer/msb_count<15>
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX........ 32
Inst_timer/msb_count<14>
XXXXXXXXXXXXXXXXXXXXX.XXXXXXXXXX........ 31
Inst_timer/msb_count<13>
XXXXXXXXXXXXXXXXXXXX..XXXXXXXXXX........ 30
Inst_timer/msb_count<12>
XXXXXXXXXXXXXXXXXXX...XXXXXXXXXX........ 29
Inst_timer/msb_count<11>
XXXXXXXXXXXXXXXXXX....XXXXXXXXXX........ 28
Inst_timer/msb_count<10>
XXXXXXXXXXXXXXXXX.....XXXXXXXXXX........ 27
0----+----1----+----2----+----3----+----4
0 0 0 0
*********************************** FB2 ***********************************
Number of function block inputs used/remaining: 15/39
Number of signals used by logic mapping into function block: 15
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
lsb_sig<6> 2 0 0 3 FB2_1 (b) (b)
lsb_sig<5> 2 0 0 3 FB2_2 99 GSR/I/O GSR/I
lsb_sig<4> 2 0 0 3 FB2_3 (b) (b)
lsb_sig<3> 2 0 0 3 FB2_4 (b) (b)
lsb_sig<2> 2 0 0 3 FB2_5 1 GTS/I/O (b)
lsb_sig<1> 2 0 0 3 FB2_6 2 GTS/I/O (b)
lsb_sig<12> 2 0 0 3 FB2_7 (b) (b)
lsb_sig<11> 2 0 0 3 FB2_8 3 GTS/I/O (b)
lsb_sig<10> 2 0 0 3 FB2_9 4 GTS/I/O (b)
lsb_sig<0> 2 0 0 3 FB2_10 (b) (b)
Inst_timer/lsb_count<9>
2 0 0 3 FB2_11 6 I/O I
Inst_timer/lsb_count<8>
2 0 0 3 FB2_12 7 I/O I
Inst_timer/lsb_count<7>
2 0 0 3 FB2_13 (b) (b)
Inst_timer/lsb_count<6>
2 0 0 3 FB2_14 8 I/O I
Inst_timer/lsb_count<13>
2 0 0 3 FB2_15 9 I/O I
Inst_timer/lsb_count<12>
2 0 0 3 FB2_16 (b) (b)
Inst_timer/lsb_count<11>
2 0 0 3 FB2_17 10 I/O I
Inst_timer/lsb_count<10>
2 0 0 3 FB2_18 (b) (b)
Signals Used by Logic in Function Block
1: Inst_timer/lsb_count<0> 6: Inst_timer/lsb_count<2> 11: Inst_timer/lsb_count<7>
2: Inst_timer/lsb_count<10> 7: Inst_timer/lsb_count<3> 12: Inst_timer/lsb_count<8>
3: Inst_timer/lsb_count<11> 8: Inst_timer/lsb_count<4> 13: Inst_timer/lsb_count<9>
4: Inst_timer/lsb_count<12> 9: Inst_timer/lsb_count<5> 14: Inst_timer/msb_count<9>/Inst_timer/msb_count<9>_RSTF__$INT
5: Inst_timer/lsb_count<1> 10: Inst_timer/lsb_count<6> 15: latch_en
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
lsb_sig<6> .........X....X......................... 2
lsb_sig<5> ........X.....X......................... 2
lsb_sig<4> .......X......X......................... 2
lsb_sig<3> ......X.......X......................... 2
lsb_sig<2> .....X........X......................... 2
lsb_sig<1> ....X.........X......................... 2
lsb_sig<12> ...X..........X......................... 2
lsb_sig<11> ..X...........X......................... 2
lsb_sig<10> .X............X......................... 2
lsb_sig<0> X.............X......................... 2
Inst_timer/lsb_count<9>
X...XXXXXXXX.X.......................... 10
Inst_timer/lsb_count<8>
X...XXXXXXX..X.......................... 9
Inst_timer/lsb_count<7>
X...XXXXXX...X.......................... 8
Inst_timer/lsb_count<6>
X...XXXXX....X.......................... 7
Inst_timer/lsb_count<13>
XXXXXXXXXXXXXX.......................... 14
Inst_timer/lsb_count<12>
XXX.XXXXXXXXXX.......................... 13
Inst_timer/lsb_count<11>
XX..XXXXXXXXXX.......................... 12
Inst_timer/lsb_count<10>
X...XXXXXXXXXX.......................... 11
0----+----1----+----2----+----3----+----4
0 0 0 0
*********************************** FB3 ***********************************
Number of function block inputs used/remaining: 19/35
Number of signals used by logic mapping into function block: 19
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
msb_sig<5> 2 0 0 3 FB3_1 (b) (b)
msb_sig<4> 2 0 0 3 FB3_2 23 GCK/I/O GCK
msb_sig<3> 2 0 0 3 FB3_3 (b) (b)
msb_sig<2> 2 0 0 3 FB3_4 (b) (b)
msb_sig<1> 2 0 0 3 FB3_5 24 I/O I
msb_sig<15> 2 0 0 3 FB3_6 25 I/O (b)
msb_sig<14> 2 0 0 3 FB3_7 (b) (b)
msb_sig<13> 2 0 0 3 FB3_8 27 GCK/I/O (b)
msb_sig<12> 2 0 0 3 FB3_9 28 I/O (b)
msb_sig<11> 2 0 0 3 FB3_10 (b) (b)
msb_sig<10> 2 0 0 3 FB3_11 29 I/O (b)
msb_sig<0> 2 0 0 3 FB3_12 30 I/O (b)
lsb_sig<9> 2 0 0 3 FB3_13 (b) (b)
lsb_sig<8> 2 0 0 3 FB3_14 32 I/O (b)
lsb_sig<7> 2 0 0 3 FB3_15 33 I/O (b)
lsb_sig<15> 2 0 0 3 FB3_16 (b) (b)
lsb_sig<14> 2 0 0 3 FB3_17 34 I/O (b)
lsb_sig<13> 2 0 0 3 FB3_18 (b) (b)
Signals Used by Logic in Function Block
1: Inst_timer/lsb_count<13> 8: Inst_timer/msb_count<10> 14: Inst_timer/msb_count<1>
2: Inst_timer/lsb_count<14> 9: Inst_timer/msb_count<11> 15: Inst_timer/msb_count<2>
3: Inst_timer/lsb_count<15> 10: Inst_timer/msb_count<12> 16: Inst_timer/msb_count<3>
4: Inst_timer/lsb_count<7> 11: Inst_timer/msb_count<13> 17: Inst_timer/msb_count<4>
5: Inst_timer/lsb_count<8> 12: Inst_timer/msb_count<14> 18: Inst_timer/msb_count<5>
6: Inst_timer/lsb_count<9> 13: Inst_timer/msb_count<15> 19: latch_en
7: Inst_timer/msb_count<0>
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
msb_sig<5> .................XX..................... 2
msb_sig<4> ................X.X..................... 2
msb_sig<3> ...............X..X..................... 2
msb_sig<2> ..............X...X..................... 2
msb_sig<1> .............X....X..................... 2
msb_sig<15> ............X.....X..................... 2
msb_sig<14> ...........X......X..................... 2
msb_sig<13> ..........X.......X..................... 2
msb_sig<12> .........X........X..................... 2
msb_sig<11> ........X.........X..................... 2
msb_sig<10> .......X..........X..................... 2
msb_sig<0> ......X...........X..................... 2
lsb_sig<9> .....X............X..................... 2
lsb_sig<8> ....X.............X..................... 2
lsb_sig<7> ...X..............X..................... 2
lsb_sig<15> ..X...............X..................... 2
lsb_sig<14> .X................X..................... 2
lsb_sig<13> X.................X..................... 2
0----+----1----+----2----+----3----+----4
0 0 0 0
*********************************** FB4 ***********************************
Number of function block inputs used/remaining: 34/20
Number of signals used by logic mapping into function block: 34
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 0 5 FB4_1 (b)
data_out<8> 4 0 0 1 FB4_2 87 I/O O
(unused) 0 0 0 5 FB4_3 (b)
(unused) 0 0 0 5 FB4_4 (b)
data_out<7> 4 0 0 1 FB4_5 89 I/O O
data_out<6> 4 0 0 1 FB4_6 90 I/O O
(unused) 0 0 0 5 FB4_7 (b)
data_out<5> 4 0 0 1 FB4_8 91 I/O O
data_out<4> 4 0 0 1 FB4_9 92 I/O O
(unused) 0 0 0 5 FB4_10 (b)
data_out<3> 4 0 0 1 FB4_11 93 I/O O
data_out<2> 5 0 0 0 FB4_12 94 I/O O
(unused) 0 0 0 5 FB4_13 (b)
data_out<1> 3 0 0 2 FB4_14 95 I/O O
data_out<0> 3 0 0 2 FB4_15 96 I/O O
(unused) 0 0 0 5 FB4_16 (b)
(unused) 0 0 0 5 FB4_17 97 I/O
(unused) 0 0 0 5 FB4_18 (b)
Signals Used by Logic in Function Block
1: channel<0> 13: lsb_sig<7> 24: msb_sig<2>
2: channel<1> 14: lsb_sig<8> 25: msb_sig<3>
3: chnid 15: module<0> 26: msb_sig<4>
4: dwc 16: module<1> 27: msb_sig<5>
5: header 17: module<2> 28: msb_sig<6>
6: lsb_sig<0> 18: module<3> 29: msb_sig<7>
7: lsb_sig<1> 19: module<4> 30: msb_sig<8>
8: lsb_sig<2> 20: module<5> 31: ndwc
9: lsb_sig<3> 21: module<6> 32: timer_lower
10: lsb_sig<4> 22: msb_sig<0> 33: timer_upper
11: lsb_sig<5> 23: msb_sig<1> 34: timersel
12: lsb_sig<6>
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
data_out<8> ..XXX........X......X........XXXXX...... 10
data_out<7> ..XXX.......X......X........X.XXXX...... 10
data_out<6> ..XXX......X......X........X..XXXX...... 10
data_out<5> ..XXX.....X......X........X...XXXX...... 10
data_out<4> ..XXX....X......X........X....XXXX...... 10
data_out<3> ..X.X...X......X........X......XXX...... 8
data_out<2> ..XXX..X......X........X......XXXX...... 10
data_out<1> .XX.X.X...............X........XXX...... 8
data_out<0> X.X.XX...............X.........XXX...... 8
0----+----1----+----2----+----3----+----4
0 0 0 0
*********************************** FB5 ***********************************
Number of function block inputs used/remaining: 7/47
Number of signals used by logic mapping into function block: 7
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 0 5 FB5_1 (b)
(unused) 0 0 0 5 FB5_2 35 I/O
(unused) 0 0 0 5 FB5_3 (b)
(unused) 0 0 0 5 FB5_4 (b)
(unused) 0 0 0 5 FB5_5 36 I/O
(unused) 0 0 0 5 FB5_6 37 I/O
(unused) 0 0 0 5 FB5_7 (b)
(unused) 0 0 0 5 FB5_8 39 I/O
(unused) 0 0 0 5 FB5_9 40 I/O
(unused) 0 0 0 5 FB5_10 (b)
(unused) 0 0 0 5 FB5_11 41 I/O
(unused) 0 0 0 5 FB5_12 42 I/O
(unused) 0 0 0 5 FB5_13 (b)
Inst_timer/msb_count<9>/Inst_timer/msb_count<9>_RSTF__$INT
1 0 0 4 FB5_14 43 I/O (b)
msb_sig<9> 2 0 0 3 FB5_15 46 I/O (b)
msb_sig<8> 2 0 0 3 FB5_16 (b) (b)
msb_sig<7> 2 0 0 3 FB5_17 49 I/O I
msb_sig<6> 2 0 0 3 FB5_18 (b) (b)
Signals Used by Logic in Function Block
1: Inst_timer/msb_count<6> 4: Inst_timer/msb_count<9> 6: reset
2: Inst_timer/msb_count<7> 5: latch_en 7: reset_timer
3: Inst_timer/msb_count<8>
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
Inst_timer/msb_count<9>/Inst_timer/msb_count<9>_RSTF__$INT
.....XX................................. 2
msb_sig<9> ...XX................................... 2
msb_sig<8> ..X.X................................... 2
msb_sig<7> .X..X................................... 2
msb_sig<6> X...X................................... 2
0----+----1----+----2----+----3----+----4
0 0 0 0
*********************************** FB6 ***********************************
Number of function block inputs used/remaining: 32/22
Number of signals used by logic mapping into function block: 32
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 0 5 FB6_1 (b)
(unused) 0 0 0 5 FB6_2 74 I/O I
(unused) 0 0 0 5 FB6_3 (b)
(unused) 0 0 0 5 FB6_4 (b)
(unused) 0 0 0 5 FB6_5 76 I/O
Inst_timer/lsb_count<0>
1 0 0 4 FB6_6 77 I/O (b)
Inst_timer/lsb_count<5>
2 0 0 3 FB6_7 (b) (b)
data_out<15> 2 0 0 3 FB6_8 78 I/O O
data_out<14> 2 0 0 3 FB6_9 79 I/O O
Inst_timer/lsb_count<4>
2 0 0 3 FB6_10 (b) (b)
data_out<13> 3 0 0 2 FB6_11 80 I/O O
data_out<12> 3 0 0 2 FB6_12 81 I/O O
Inst_timer/lsb_count<3>
2 0 0 3 FB6_13 (b) (b)
data_out<11> 5 0 0 0 FB6_14 82 I/O O
data_out<10> 6 1<- 0 0 FB6_15 85 I/O O
Inst_timer/lsb_count<2>
2 0 /\1 2 FB6_16 (b) (b)
data_out<9> 7 2<- 0 0 FB6_17 86 I/O O
Inst_timer/lsb_count<1>
2 0 /\2 1 FB6_18 (b) (b)
Signals Used by Logic in Function Block
1: Inst_timer/lsb_count<0> 12: lsb_sig<10> 23: msb_sig<13>
2: Inst_timer/lsb_count<1> 13: lsb_sig<11> 24: msb_sig<14>
3: Inst_timer/lsb_count<2> 14: lsb_sig<12> 25: msb_sig<15>
4: Inst_timer/lsb_count<3> 15: lsb_sig<13> 26: msb_sig<9>
5: Inst_timer/lsb_count<4> 16: lsb_sig<14> 27: ndwc
6: Inst_timer/msb_count<9>/Inst_timer/msb_count<9>_RSTF__$INT 17: lsb_sig<15> 28: pt<0>
7: chnid 18: lsb_sig<9> 29: pt<1>
8: dr<0> 19: module<7> 30: timer_lower
9: dr<1> 20: msb_sig<10> 31: timer_upper
10: dwc 21: msb_sig<11> 32: timersel
11: header 22: msb_sig<12>
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
Inst_timer/lsb_count<0>
.....X.................................. 1
Inst_timer/lsb_count<5>
XXXXXX.................................. 6
data_out<15> ......X...X.....X.......X....XXX........ 7
data_out<14> ......X...X....X.......X.....XXX........ 7
Inst_timer/lsb_count<4>
XXXX.X.................................. 5
data_out<13> ......X.X.X...X.......X......XXX........ 8
data_out<12> ......XX..X..X.......X.......XXX........ 8
Inst_timer/lsb_count<3>
XXX..X.................................. 4
data_out<11> ......X..XX.X.......X.....X.XXXX........ 10
data_out<10> ......X..XXX.......X......XXXXXX........ 11
Inst_timer/lsb_count<2>
XX...X.................................. 3
data_out<9> ......X..XX......XX......XXXXXXX........ 12
Inst_timer/lsb_count<1>
X....X.................................. 2
0----+----1----+----2----+----3----+----4
0 0 0 0
*********************************** FB7 ***********************************
Number of function block inputs used/remaining: 0/54
Number of signals used by logic mapping into function block: 0
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 0 5 FB7_1 (b)
(unused) 0 0 0 5 FB7_2 50 I/O I
(unused) 0 0 0 5 FB7_3 (b)
(unused) 0 0 0 5 FB7_4 (b)
(unused) 0 0 0 5 FB7_5 52 I/O
(unused) 0 0 0 5 FB7_6 53 I/O
(unused) 0 0 0 5 FB7_7 (b)
(unused) 0 0 0 5 FB7_8 54 I/O
(unused) 0 0 0 5 FB7_9 55 I/O
(unused) 0 0 0 5 FB7_10 (b)
(unused) 0 0 0 5 FB7_11 56 I/O
(unused) 0 0 0 5 FB7_12 58 I/O
(unused) 0 0 0 5 FB7_13 (b)
(unused) 0 0 0 5 FB7_14 59 I/O
(unused) 0 0 0 5 FB7_15 60 I/O
(unused) 0 0 0 5 FB7_16 (b)
(unused) 0 0 0 5 FB7_17 61 I/O
(unused) 0 0 0 5 FB7_18 (b)
*********************************** FB8 ***********************************
Number of function block inputs used/remaining: 0/54
Number of signals used by logic mapping into function block: 0
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 0 5 FB8_1 (b)
(unused) 0 0 0 5 FB8_2 63 I/O
(unused) 0 0 0 5 FB8_3 (b)
(unused) 0 0 0 5 FB8_4 (b)
(unused) 0 0 0 5 FB8_5 64 I/O
(unused) 0 0 0 5 FB8_6 65 I/O
(unused) 0 0 0 5 FB8_7 (b)
(unused) 0 0 0 5 FB8_8 66 I/O
(unused) 0 0 0 5 FB8_9 67 I/O I
(unused) 0 0 0 5 FB8_10 (b)
(unused) 0 0 0 5 FB8_11 68 I/O I
(unused) 0 0 0 5 FB8_12 70 I/O I
(unused) 0 0 0 5 FB8_13 (b)
(unused) 0 0 0 5 FB8_14 71 I/O I
(unused) 0 0 0 5 FB8_15 72 I/O I
(unused) 0 0 0 5 FB8_16 (b)
(unused) 0 0 0 5 FB8_17 73 I/O I
(unused) 0 0 0 5 FB8_18 (b)
******************************* Equations ********************************
********** Mapped Logic **********
FTCPE_Inst_timer/lsb_count0: FTCPE port map (Inst_timer/lsb_count(0),'1',timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0');
FTCPE_Inst_timer/lsb_count1: FTCPE port map (Inst_timer/lsb_count(1),Inst_timer/lsb_count(0),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0');
FTCPE_Inst_timer/lsb_count2: FTCPE port map (Inst_timer/lsb_count(2),Inst_timer/lsb_count_T(2),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0');
Inst_timer/lsb_count_T(2) <= (Inst_timer/lsb_count(0) AND Inst_timer/lsb_count(1));
FTCPE_Inst_timer/lsb_count3: FTCPE port map (Inst_timer/lsb_count(3),Inst_timer/lsb_count_T(3),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0');
Inst_timer/lsb_count_T(3) <= (Inst_timer/lsb_count(0) AND Inst_timer/lsb_count(1) AND
Inst_timer/lsb_count(2));
FTCPE_Inst_timer/lsb_count4: FTCPE port map (Inst_timer/lsb_count(4),Inst_timer/lsb_count_T(4),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0');
Inst_timer/lsb_count_T(4) <= (Inst_timer/lsb_count(0) AND Inst_timer/lsb_count(1) AND
Inst_timer/lsb_count(2) AND Inst_timer/lsb_count(3));
FTCPE_Inst_timer/lsb_count5: FTCPE port map (Inst_timer/lsb_count(5),Inst_timer/lsb_count_T(5),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0');
Inst_timer/lsb_count_T(5) <= (Inst_timer/lsb_count(0) AND Inst_timer/lsb_count(1) AND
Inst_timer/lsb_count(2) AND Inst_timer/lsb_count(3) AND Inst_timer/lsb_count(4));
FTCPE_Inst_timer/lsb_count6: FTCPE port map (Inst_timer/lsb_count(6),Inst_timer/lsb_count_T(6),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0');
Inst_timer/lsb_count_T(6) <= (Inst_timer/lsb_count(0) AND Inst_timer/lsb_count(1) AND
Inst_timer/lsb_count(2) AND Inst_timer/lsb_count(3) AND Inst_timer/lsb_count(4) AND
Inst_timer/lsb_count(5));
FTCPE_Inst_timer/lsb_count7: FTCPE port map (Inst_timer/lsb_count(7),Inst_timer/lsb_count_T(7),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0');
Inst_timer/lsb_count_T(7) <= (Inst_timer/lsb_count(0) AND Inst_timer/lsb_count(1) AND
Inst_timer/lsb_count(2) AND Inst_timer/lsb_count(3) AND Inst_timer/lsb_count(4) AND
Inst_timer/lsb_count(5) AND Inst_timer/lsb_count(6));
FTCPE_Inst_timer/lsb_count8: FTCPE port map (Inst_timer/lsb_count(8),Inst_timer/lsb_count_T(8),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0');
Inst_timer/lsb_count_T(8) <= (Inst_timer/lsb_count(0) AND Inst_timer/lsb_count(1) AND
Inst_timer/lsb_count(2) AND Inst_timer/lsb_count(3) AND Inst_timer/lsb_count(4) AND
Inst_timer/lsb_count(5) AND Inst_timer/lsb_count(6) AND Inst_timer/lsb_count(7));
FTCPE_Inst_timer/lsb_count9: FTCPE port map (Inst_timer/lsb_count(9),Inst_timer/lsb_count_T(9),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0');
Inst_timer/lsb_count_T(9) <= (Inst_timer/lsb_count(0) AND Inst_timer/lsb_count(1) AND
Inst_timer/lsb_count(2) AND Inst_timer/lsb_count(3) AND Inst_timer/lsb_count(4) AND
Inst_timer/lsb_count(5) AND Inst_timer/lsb_count(6) AND Inst_timer/lsb_count(7) AND
Inst_timer/lsb_count(8));
FTCPE_Inst_timer/lsb_count10: FTCPE port map (Inst_timer/lsb_count(10),Inst_timer/lsb_count_T(10),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0');
Inst_timer/lsb_count_T(10) <= (Inst_timer/lsb_count(0) AND Inst_timer/lsb_count(1) AND
Inst_timer/lsb_count(2) AND Inst_timer/lsb_count(3) AND Inst_timer/lsb_count(4) AND
Inst_timer/lsb_count(5) AND Inst_timer/lsb_count(6) AND Inst_timer/lsb_count(7) AND
Inst_timer/lsb_count(8) AND Inst_timer/lsb_count(9));
FTCPE_Inst_timer/lsb_count11: FTCPE port map (Inst_timer/lsb_count(11),Inst_timer/lsb_count_T(11),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0');
Inst_timer/lsb_count_T(11) <= (Inst_timer/lsb_count(0) AND
Inst_timer/lsb_count(10) AND Inst_timer/lsb_count(1) AND Inst_timer/lsb_count(2) AND
Inst_timer/lsb_count(3) AND Inst_timer/lsb_count(4) AND Inst_timer/lsb_count(5) AND
Inst_timer/lsb_count(6) AND Inst_timer/lsb_count(7) AND Inst_timer/lsb_count(8) AND
Inst_timer/lsb_count(9));
FTCPE_Inst_timer/lsb_count12: FTCPE port map (Inst_timer/lsb_count(12),Inst_timer/lsb_count_T(12),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0');
Inst_timer/lsb_count_T(12) <= (Inst_timer/lsb_count(0) AND
Inst_timer/lsb_count(10) AND Inst_timer/lsb_count(11) AND
Inst_timer/lsb_count(1) AND Inst_timer/lsb_count(2) AND Inst_timer/lsb_count(3) AND
Inst_timer/lsb_count(4) AND Inst_timer/lsb_count(5) AND Inst_timer/lsb_count(6) AND
Inst_timer/lsb_count(7) AND Inst_timer/lsb_count(8) AND Inst_timer/lsb_count(9));
FTCPE_Inst_timer/lsb_count13: FTCPE port map (Inst_timer/lsb_count(13),Inst_timer/lsb_count_T(13),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0');
Inst_timer/lsb_count_T(13) <= (Inst_timer/lsb_count(0) AND
Inst_timer/lsb_count(10) AND Inst_timer/lsb_count(11) AND
Inst_timer/lsb_count(12) AND Inst_timer/lsb_count(1) AND Inst_timer/lsb_count(2) AND
Inst_timer/lsb_count(3) AND Inst_timer/lsb_count(4) AND Inst_timer/lsb_count(5) AND
Inst_timer/lsb_count(6) AND Inst_timer/lsb_count(7) AND Inst_timer/lsb_count(8) AND
Inst_timer/lsb_count(9));
FTCPE_Inst_timer/lsb_count14: FTCPE port map (Inst_timer/lsb_count(14),Inst_timer/lsb_count_T(14),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0');
Inst_timer/lsb_count_T(14) <= (Inst_timer/lsb_count(0) AND
Inst_timer/lsb_count(10) AND Inst_timer/lsb_count(11) AND
Inst_timer/lsb_count(12) AND Inst_timer/lsb_count(13) AND
Inst_timer/lsb_count(1) AND Inst_timer/lsb_count(2) AND Inst_timer/lsb_count(3) AND
Inst_timer/lsb_count(4) AND Inst_timer/lsb_count(5) AND Inst_timer/lsb_count(6) AND
Inst_timer/lsb_count(7) AND Inst_timer/lsb_count(8) AND Inst_timer/lsb_count(9));
FTCPE_Inst_timer/lsb_count15: FTCPE port map (Inst_timer/lsb_count(15),Inst_timer/lsb_count_T(15),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0');
Inst_timer/lsb_count_T(15) <= (Inst_timer/lsb_count(0) AND
Inst_timer/lsb_count(10) AND Inst_timer/lsb_count(11) AND
Inst_timer/lsb_count(12) AND Inst_timer/lsb_count(13) AND
Inst_timer/lsb_count(14) AND Inst_timer/lsb_count(1) AND Inst_timer/lsb_count(2) AND
Inst_timer/lsb_count(3) AND Inst_timer/lsb_count(4) AND Inst_timer/lsb_count(5) AND
Inst_timer/lsb_count(6) AND Inst_timer/lsb_count(7) AND Inst_timer/lsb_count(8) AND
Inst_timer/lsb_count(9));
FTCPE_Inst_timer/msb_count0: FTCPE port map (Inst_timer/msb_count(0),'1',timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0',Inst_timer/msb_count_CE(0));
Inst_timer/msb_count_CE(0) <= (Inst_timer/lsb_count(0) AND
Inst_timer/lsb_count(10) AND Inst_timer/lsb_count(11) AND
Inst_timer/lsb_count(12) AND Inst_timer/lsb_count(13) AND
Inst_timer/lsb_count(14) AND Inst_timer/lsb_count(1) AND Inst_timer/lsb_count(2) AND
Inst_timer/lsb_count(3) AND Inst_timer/lsb_count(4) AND Inst_timer/lsb_count(5) AND
Inst_timer/lsb_count(6) AND Inst_timer/lsb_count(7) AND Inst_timer/lsb_count(8) AND
Inst_timer/lsb_count(9) AND Inst_timer/lsb_count(15));
FTCPE_Inst_timer/msb_count1: FTCPE port map (Inst_timer/msb_count(1),Inst_timer/msb_count(0),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0',Inst_timer/msb_count_CE(1));
Inst_timer/msb_count_CE(1) <= (Inst_timer/lsb_count(0) AND
Inst_timer/lsb_count(10) AND Inst_timer/lsb_count(11) AND
Inst_timer/lsb_count(12) AND Inst_timer/lsb_count(13) AND
Inst_timer/lsb_count(14) AND Inst_timer/lsb_count(1) AND Inst_timer/lsb_count(2) AND
Inst_timer/lsb_count(3) AND Inst_timer/lsb_count(4) AND Inst_timer/lsb_count(5) AND
Inst_timer/lsb_count(6) AND Inst_timer/lsb_count(7) AND Inst_timer/lsb_count(8) AND
Inst_timer/lsb_count(9) AND Inst_timer/lsb_count(15));
FTCPE_Inst_timer/msb_count2: FTCPE port map (Inst_timer/msb_count(2),Inst_timer/msb_count_T(2),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0',Inst_timer/msb_count_CE(2));
Inst_timer/msb_count_T(2) <= (Inst_timer/msb_count(0) AND Inst_timer/msb_count(1));
Inst_timer/msb_count_CE(2) <= (Inst_timer/lsb_count(0) AND
Inst_timer/lsb_count(10) AND Inst_timer/lsb_count(11) AND
Inst_timer/lsb_count(12) AND Inst_timer/lsb_count(13) AND
Inst_timer/lsb_count(14) AND Inst_timer/lsb_count(1) AND Inst_timer/lsb_count(2) AND
Inst_timer/lsb_count(3) AND Inst_timer/lsb_count(4) AND Inst_timer/lsb_count(5) AND
Inst_timer/lsb_count(6) AND Inst_timer/lsb_count(7) AND Inst_timer/lsb_count(8) AND
Inst_timer/lsb_count(9) AND Inst_timer/lsb_count(15));
FTCPE_Inst_timer/msb_count3: FTCPE port map (Inst_timer/msb_count(3),Inst_timer/msb_count_T(3),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0',Inst_timer/msb_count_CE(3));
Inst_timer/msb_count_T(3) <= (Inst_timer/msb_count(0) AND Inst_timer/msb_count(1) AND
Inst_timer/msb_count(2));
Inst_timer/msb_count_CE(3) <= (Inst_timer/lsb_count(0) AND
Inst_timer/lsb_count(10) AND Inst_timer/lsb_count(11) AND
Inst_timer/lsb_count(12) AND Inst_timer/lsb_count(13) AND
Inst_timer/lsb_count(14) AND Inst_timer/lsb_count(1) AND Inst_timer/lsb_count(2) AND
Inst_timer/lsb_count(3) AND Inst_timer/lsb_count(4) AND Inst_timer/lsb_count(5) AND
Inst_timer/lsb_count(6) AND Inst_timer/lsb_count(7) AND Inst_timer/lsb_count(8) AND
Inst_timer/lsb_count(9) AND Inst_timer/lsb_count(15));
FTCPE_Inst_timer/msb_count4: FTCPE port map (Inst_timer/msb_count(4),Inst_timer/msb_count_T(4),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0',Inst_timer/msb_count_CE(4));
Inst_timer/msb_count_T(4) <= (Inst_timer/msb_count(0) AND Inst_timer/msb_count(1) AND
Inst_timer/msb_count(2) AND Inst_timer/msb_count(3));
Inst_timer/msb_count_CE(4) <= (Inst_timer/lsb_count(0) AND
Inst_timer/lsb_count(10) AND Inst_timer/lsb_count(11) AND
Inst_timer/lsb_count(12) AND Inst_timer/lsb_count(13) AND
Inst_timer/lsb_count(14) AND Inst_timer/lsb_count(1) AND Inst_timer/lsb_count(2) AND
Inst_timer/lsb_count(3) AND Inst_timer/lsb_count(4) AND Inst_timer/lsb_count(5) AND
Inst_timer/lsb_count(6) AND Inst_timer/lsb_count(7) AND Inst_timer/lsb_count(8) AND
Inst_timer/lsb_count(9) AND Inst_timer/lsb_count(15));
FTCPE_Inst_timer/msb_count5: FTCPE port map (Inst_timer/msb_count(5),Inst_timer/msb_count_T(5),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0',Inst_timer/msb_count_CE(5));
Inst_timer/msb_count_T(5) <= (Inst_timer/msb_count(0) AND Inst_timer/msb_count(1) AND
Inst_timer/msb_count(2) AND Inst_timer/msb_count(3) AND Inst_timer/msb_count(4));
Inst_timer/msb_count_CE(5) <= (Inst_timer/lsb_count(0) AND
Inst_timer/lsb_count(10) AND Inst_timer/lsb_count(11) AND
Inst_timer/lsb_count(12) AND Inst_timer/lsb_count(13) AND
Inst_timer/lsb_count(14) AND Inst_timer/lsb_count(1) AND Inst_timer/lsb_count(2) AND
Inst_timer/lsb_count(3) AND Inst_timer/lsb_count(4) AND Inst_timer/lsb_count(5) AND
Inst_timer/lsb_count(6) AND Inst_timer/lsb_count(7) AND Inst_timer/lsb_count(8) AND
Inst_timer/lsb_count(9) AND Inst_timer/lsb_count(15));
FTCPE_Inst_timer/msb_count6: FTCPE port map (Inst_timer/msb_count(6),Inst_timer/msb_count_T(6),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0',Inst_timer/msb_count_CE(6));
Inst_timer/msb_count_T(6) <= (Inst_timer/msb_count(0) AND Inst_timer/msb_count(1) AND
Inst_timer/msb_count(2) AND Inst_timer/msb_count(3) AND Inst_timer/msb_count(4) AND
Inst_timer/msb_count(5));
Inst_timer/msb_count_CE(6) <= (Inst_timer/lsb_count(0) AND
Inst_timer/lsb_count(10) AND Inst_timer/lsb_count(11) AND
Inst_timer/lsb_count(12) AND Inst_timer/lsb_count(13) AND
Inst_timer/lsb_count(14) AND Inst_timer/lsb_count(1) AND Inst_timer/lsb_count(2) AND
Inst_timer/lsb_count(3) AND Inst_timer/lsb_count(4) AND Inst_timer/lsb_count(5) AND
Inst_timer/lsb_count(6) AND Inst_timer/lsb_count(7) AND Inst_timer/lsb_count(8) AND
Inst_timer/lsb_count(9) AND Inst_timer/lsb_count(15));
FTCPE_Inst_timer/msb_count7: FTCPE port map (Inst_timer/msb_count(7),Inst_timer/msb_count_T(7),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0',Inst_timer/msb_count_CE(7));
Inst_timer/msb_count_T(7) <= (Inst_timer/msb_count(0) AND Inst_timer/msb_count(1) AND
Inst_timer/msb_count(2) AND Inst_timer/msb_count(3) AND Inst_timer/msb_count(4) AND
Inst_timer/msb_count(5) AND Inst_timer/msb_count(6));
Inst_timer/msb_count_CE(7) <= (Inst_timer/lsb_count(0) AND
Inst_timer/lsb_count(10) AND Inst_timer/lsb_count(11) AND
Inst_timer/lsb_count(12) AND Inst_timer/lsb_count(13) AND
Inst_timer/lsb_count(14) AND Inst_timer/lsb_count(1) AND Inst_timer/lsb_count(2) AND
Inst_timer/lsb_count(3) AND Inst_timer/lsb_count(4) AND Inst_timer/lsb_count(5) AND
Inst_timer/lsb_count(6) AND Inst_timer/lsb_count(7) AND Inst_timer/lsb_count(8) AND
Inst_timer/lsb_count(9) AND Inst_timer/lsb_count(15));
FTCPE_Inst_timer/msb_count8: FTCPE port map (Inst_timer/msb_count(8),Inst_timer/msb_count_T(8),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0',Inst_timer/msb_count_CE(8));
Inst_timer/msb_count_T(8) <= (Inst_timer/msb_count(0) AND Inst_timer/msb_count(1) AND
Inst_timer/msb_count(2) AND Inst_timer/msb_count(3) AND Inst_timer/msb_count(4) AND
Inst_timer/msb_count(5) AND Inst_timer/msb_count(6) AND Inst_timer/msb_count(7));
Inst_timer/msb_count_CE(8) <= (Inst_timer/lsb_count(0) AND
Inst_timer/lsb_count(10) AND Inst_timer/lsb_count(11) AND
Inst_timer/lsb_count(12) AND Inst_timer/lsb_count(13) AND
Inst_timer/lsb_count(14) AND Inst_timer/lsb_count(1) AND Inst_timer/lsb_count(2) AND
Inst_timer/lsb_count(3) AND Inst_timer/lsb_count(4) AND Inst_timer/lsb_count(5) AND
Inst_timer/lsb_count(6) AND Inst_timer/lsb_count(7) AND Inst_timer/lsb_count(8) AND
Inst_timer/lsb_count(9) AND Inst_timer/lsb_count(15));
FTCPE_Inst_timer/msb_count9: FTCPE port map (Inst_timer/msb_count(9),Inst_timer/msb_count_T(9),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0',Inst_timer/msb_count_CE(9));
Inst_timer/msb_count_T(9) <= (Inst_timer/msb_count(0) AND Inst_timer/msb_count(1) AND
Inst_timer/msb_count(2) AND Inst_timer/msb_count(3) AND Inst_timer/msb_count(4) AND
Inst_timer/msb_count(5) AND Inst_timer/msb_count(6) AND Inst_timer/msb_count(7) AND
Inst_timer/msb_count(8));
Inst_timer/msb_count_CE(9) <= (Inst_timer/lsb_count(0) AND
Inst_timer/lsb_count(10) AND Inst_timer/lsb_count(11) AND
Inst_timer/lsb_count(12) AND Inst_timer/lsb_count(13) AND
Inst_timer/lsb_count(14) AND Inst_timer/lsb_count(1) AND Inst_timer/lsb_count(2) AND
Inst_timer/lsb_count(3) AND Inst_timer/lsb_count(4) AND Inst_timer/lsb_count(5) AND
Inst_timer/lsb_count(6) AND Inst_timer/lsb_count(7) AND Inst_timer/lsb_count(8) AND
Inst_timer/lsb_count(9) AND Inst_timer/lsb_count(15));
Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT <= (reset AND reset_timer);
FTCPE_Inst_timer/msb_count10: FTCPE port map (Inst_timer/msb_count(10),Inst_timer/msb_count_T(10),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0',Inst_timer/msb_count_CE(10));
Inst_timer/msb_count_T(10) <= (Inst_timer/msb_count(0) AND Inst_timer/msb_count(1) AND
Inst_timer/msb_count(2) AND Inst_timer/msb_count(3) AND Inst_timer/msb_count(4) AND
Inst_timer/msb_count(5) AND Inst_timer/msb_count(6) AND Inst_timer/msb_count(7) AND
Inst_timer/msb_count(8) AND Inst_timer/msb_count(9));
Inst_timer/msb_count_CE(10) <= (Inst_timer/lsb_count(0) AND
Inst_timer/lsb_count(10) AND Inst_timer/lsb_count(11) AND
Inst_timer/lsb_count(12) AND Inst_timer/lsb_count(13) AND
Inst_timer/lsb_count(14) AND Inst_timer/lsb_count(1) AND Inst_timer/lsb_count(2) AND
Inst_timer/lsb_count(3) AND Inst_timer/lsb_count(4) AND Inst_timer/lsb_count(5) AND
Inst_timer/lsb_count(6) AND Inst_timer/lsb_count(7) AND Inst_timer/lsb_count(8) AND
Inst_timer/lsb_count(9) AND Inst_timer/lsb_count(15));
FTCPE_Inst_timer/msb_count11: FTCPE port map (Inst_timer/msb_count(11),Inst_timer/msb_count_T(11),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0',Inst_timer/msb_count_CE(11));
Inst_timer/msb_count_T(11) <= (Inst_timer/msb_count(0) AND
Inst_timer/msb_count(10) AND Inst_timer/msb_count(1) AND Inst_timer/msb_count(2) AND
Inst_timer/msb_count(3) AND Inst_timer/msb_count(4) AND Inst_timer/msb_count(5) AND
Inst_timer/msb_count(6) AND Inst_timer/msb_count(7) AND Inst_timer/msb_count(8) AND
Inst_timer/msb_count(9));
Inst_timer/msb_count_CE(11) <= (Inst_timer/lsb_count(0) AND
Inst_timer/lsb_count(10) AND Inst_timer/lsb_count(11) AND
Inst_timer/lsb_count(12) AND Inst_timer/lsb_count(13) AND
Inst_timer/lsb_count(14) AND Inst_timer/lsb_count(1) AND Inst_timer/lsb_count(2) AND
Inst_timer/lsb_count(3) AND Inst_timer/lsb_count(4) AND Inst_timer/lsb_count(5) AND
Inst_timer/lsb_count(6) AND Inst_timer/lsb_count(7) AND Inst_timer/lsb_count(8) AND
Inst_timer/lsb_count(9) AND Inst_timer/lsb_count(15));
FTCPE_Inst_timer/msb_count12: FTCPE port map (Inst_timer/msb_count(12),Inst_timer/msb_count_T(12),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0',Inst_timer/msb_count_CE(12));
Inst_timer/msb_count_T(12) <= (Inst_timer/msb_count(0) AND
Inst_timer/msb_count(10) AND Inst_timer/msb_count(11) AND
Inst_timer/msb_count(1) AND Inst_timer/msb_count(2) AND Inst_timer/msb_count(3) AND
Inst_timer/msb_count(4) AND Inst_timer/msb_count(5) AND Inst_timer/msb_count(6) AND
Inst_timer/msb_count(7) AND Inst_timer/msb_count(8) AND Inst_timer/msb_count(9));
Inst_timer/msb_count_CE(12) <= (Inst_timer/lsb_count(0) AND
Inst_timer/lsb_count(10) AND Inst_timer/lsb_count(11) AND
Inst_timer/lsb_count(12) AND Inst_timer/lsb_count(13) AND
Inst_timer/lsb_count(14) AND Inst_timer/lsb_count(1) AND Inst_timer/lsb_count(2) AND
Inst_timer/lsb_count(3) AND Inst_timer/lsb_count(4) AND Inst_timer/lsb_count(5) AND
Inst_timer/lsb_count(6) AND Inst_timer/lsb_count(7) AND Inst_timer/lsb_count(8) AND
Inst_timer/lsb_count(9) AND Inst_timer/lsb_count(15));
FTCPE_Inst_timer/msb_count13: FTCPE port map (Inst_timer/msb_count(13),Inst_timer/msb_count_T(13),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0',Inst_timer/msb_count_CE(13));
Inst_timer/msb_count_T(13) <= (Inst_timer/msb_count(0) AND
Inst_timer/msb_count(10) AND Inst_timer/msb_count(11) AND
Inst_timer/msb_count(12) AND Inst_timer/msb_count(1) AND Inst_timer/msb_count(2) AND
Inst_timer/msb_count(3) AND Inst_timer/msb_count(4) AND Inst_timer/msb_count(5) AND
Inst_timer/msb_count(6) AND Inst_timer/msb_count(7) AND Inst_timer/msb_count(8) AND
Inst_timer/msb_count(9));
Inst_timer/msb_count_CE(13) <= (Inst_timer/lsb_count(0) AND
Inst_timer/lsb_count(10) AND Inst_timer/lsb_count(11) AND
Inst_timer/lsb_count(12) AND Inst_timer/lsb_count(13) AND
Inst_timer/lsb_count(14) AND Inst_timer/lsb_count(1) AND Inst_timer/lsb_count(2) AND
Inst_timer/lsb_count(3) AND Inst_timer/lsb_count(4) AND Inst_timer/lsb_count(5) AND
Inst_timer/lsb_count(6) AND Inst_timer/lsb_count(7) AND Inst_timer/lsb_count(8) AND
Inst_timer/lsb_count(9) AND Inst_timer/lsb_count(15));
FTCPE_Inst_timer/msb_count14: FTCPE port map (Inst_timer/msb_count(14),Inst_timer/msb_count_T(14),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0',Inst_timer/msb_count_CE(14));
Inst_timer/msb_count_T(14) <= (Inst_timer/msb_count(0) AND
Inst_timer/msb_count(10) AND Inst_timer/msb_count(11) AND
Inst_timer/msb_count(12) AND Inst_timer/msb_count(13) AND
Inst_timer/msb_count(1) AND Inst_timer/msb_count(2) AND Inst_timer/msb_count(3) AND
Inst_timer/msb_count(4) AND Inst_timer/msb_count(5) AND Inst_timer/msb_count(6) AND
Inst_timer/msb_count(7) AND Inst_timer/msb_count(8) AND Inst_timer/msb_count(9));
Inst_timer/msb_count_CE(14) <= (Inst_timer/lsb_count(0) AND
Inst_timer/lsb_count(10) AND Inst_timer/lsb_count(11) AND
Inst_timer/lsb_count(12) AND Inst_timer/lsb_count(13) AND
Inst_timer/lsb_count(14) AND Inst_timer/lsb_count(1) AND Inst_timer/lsb_count(2) AND
Inst_timer/lsb_count(3) AND Inst_timer/lsb_count(4) AND Inst_timer/lsb_count(5) AND
Inst_timer/lsb_count(6) AND Inst_timer/lsb_count(7) AND Inst_timer/lsb_count(8) AND
Inst_timer/lsb_count(9) AND Inst_timer/lsb_count(15));
FTCPE_Inst_timer/msb_count15: FTCPE port map (Inst_timer/msb_count(15),Inst_timer/msb_count_T(15),timeclk,NOT Inst_timer/msb_count(9)/Inst_timer/msb_count(9)_RSTF__$INT,'0',Inst_timer/msb_count_CE(15));
Inst_timer/msb_count_T(15) <= (Inst_timer/msb_count(0) AND
Inst_timer/msb_count(10) AND Inst_timer/msb_count(11) AND
Inst_timer/msb_count(12) AND Inst_timer/msb_count(13) AND
Inst_timer/msb_count(14) AND Inst_timer/msb_count(1) AND Inst_timer/msb_count(2) AND
Inst_timer/msb_count(3) AND Inst_timer/msb_count(4) AND Inst_timer/msb_count(5) AND
Inst_timer/msb_count(6) AND Inst_timer/msb_count(7) AND Inst_timer/msb_count(8) AND
Inst_timer/msb_count(9));
Inst_timer/msb_count_CE(15) <= (Inst_timer/lsb_count(0) AND
Inst_timer/lsb_count(10) AND Inst_timer/lsb_count(11) AND
Inst_timer/lsb_count(12) AND Inst_timer/lsb_count(13) AND
Inst_timer/lsb_count(14) AND Inst_timer/lsb_count(1) AND Inst_timer/lsb_count(2) AND
Inst_timer/lsb_count(3) AND Inst_timer/lsb_count(4) AND Inst_timer/lsb_count(5) AND
Inst_timer/lsb_count(6) AND Inst_timer/lsb_count(7) AND Inst_timer/lsb_count(8) AND
Inst_timer/lsb_count(9) AND Inst_timer/lsb_count(15));
data_out(0) <= ((header AND NOT timersel AND NOT chnid AND channel(0))
OR (msb_sig(0) AND header AND NOT timersel AND chnid AND
NOT timer_upper)
OR (lsb_sig(0) AND header AND NOT timersel AND NOT timer_lower AND
chnid AND timer_upper));
data_out(1) <= ((header AND NOT timersel AND NOT chnid AND channel(1))
OR (msb_sig(1) AND header AND NOT timersel AND chnid AND
NOT timer_upper)
OR (lsb_sig(1) AND header AND NOT timersel AND NOT timer_lower AND
chnid AND timer_upper));
data_out(2) <= ((NOT header AND NOT timersel)
OR (NOT timersel AND module(0) AND NOT chnid)
OR (msb_sig(2) AND NOT timersel AND chnid AND NOT timer_upper)
OR (lsb_sig(2) AND NOT timersel AND NOT timer_lower AND chnid AND
timer_upper)
OR (NOT timersel AND timer_lower AND NOT ndwc AND dwc AND chnid AND
timer_upper));
data_out(3) <= ((NOT header AND NOT timersel)
OR (NOT timersel AND module(1) AND NOT chnid)
OR (msb_sig(3) AND NOT timersel AND chnid AND NOT timer_upper)
OR (lsb_sig(3) AND NOT timersel AND NOT timer_lower AND chnid AND
timer_upper));
data_out(4) <= ((header AND NOT timersel AND NOT chnid AND module(2))
OR (msb_sig(4) AND header AND NOT timersel AND chnid AND
NOT timer_upper)
OR (lsb_sig(4) AND header AND NOT timersel AND NOT timer_lower AND
chnid AND timer_upper)
OR (header AND NOT timersel AND timer_lower AND NOT ndwc AND dwc AND
chnid AND timer_upper));
data_out(5) <= ((header AND NOT timersel AND NOT chnid AND module(3))
OR (msb_sig(5) AND header AND NOT timersel AND chnid AND
NOT timer_upper)
OR (lsb_sig(5) AND header AND NOT timersel AND NOT timer_lower AND
chnid AND timer_upper)
OR (header AND NOT timersel AND timer_lower AND NOT ndwc AND dwc AND
chnid AND timer_upper));
data_out(6) <= ((header AND NOT timersel AND NOT chnid AND module(4))
OR (msb_sig(6) AND header AND NOT timersel AND chnid AND
NOT timer_upper)
OR (lsb_sig(6) AND header AND NOT timersel AND NOT timer_lower AND
chnid AND timer_upper)
OR (header AND NOT timersel AND timer_lower AND NOT ndwc AND dwc AND
chnid AND timer_upper));
data_out(7) <= ((header AND NOT timersel AND NOT chnid AND module(5))
OR (msb_sig(7) AND header AND NOT timersel AND chnid AND
NOT timer_upper)
OR (lsb_sig(7) AND header AND NOT timersel AND NOT timer_lower AND
chnid AND timer_upper)
OR (header AND NOT timersel AND timer_lower AND NOT ndwc AND dwc AND
chnid AND timer_upper));
data_out(8) <= ((header AND NOT timersel AND NOT chnid AND module(6))
OR (msb_sig(8) AND header AND NOT timersel AND chnid AND
NOT timer_upper)
OR (lsb_sig(8) AND header AND NOT timersel AND NOT timer_lower AND
chnid AND timer_upper)
OR (header AND NOT timersel AND timer_lower AND NOT ndwc AND dwc AND
chnid AND timer_upper));
data_out(9) <= ((Inst_timer/lsb_count(1).EXP)
OR (header AND NOT timersel AND NOT chnid AND module(7))
OR (msb_sig(9) AND header AND NOT timersel AND chnid AND
NOT timer_upper)
OR (lsb_sig(9) AND header AND NOT timersel AND NOT timer_lower AND
chnid AND timer_upper)
OR (header AND NOT timersel AND timer_lower AND NOT dwc AND chnid AND
pt(1) AND pt(0) AND timer_upper)
OR (header AND NOT timersel AND timer_lower AND NOT dwc AND chnid AND
NOT pt(1) AND NOT pt(0) AND timer_upper));
data_out(10) <= ((Inst_timer/lsb_count(2).EXP)
OR (header AND NOT timersel AND NOT chnid AND pt(0))
OR (msb_sig(10) AND header AND NOT timersel AND chnid AND
NOT timer_upper)
OR (lsb_sig(10) AND header AND NOT timersel AND NOT timer_lower AND
chnid AND timer_upper)
OR (header AND NOT timersel AND timer_lower AND NOT dwc AND NOT pt(1) AND
pt(0) AND timer_upper)
OR (header AND NOT timersel AND timer_lower AND NOT ndwc AND dwc AND
chnid AND pt(1) AND timer_upper));
data_out(11) <= ((header AND NOT timersel AND NOT chnid AND pt(1))
OR (msb_sig(11) AND header AND NOT timersel AND chnid AND
NOT timer_upper)
OR (lsb_sig(11) AND header AND NOT timersel AND NOT timer_lower AND
chnid AND timer_upper)
OR (header AND NOT timersel AND timer_lower AND NOT dwc AND pt(1) AND
timer_upper)
OR (header AND NOT timersel AND timer_lower AND NOT ndwc AND dwc AND
chnid AND NOT pt(1) AND timer_upper));
data_out(12) <= ((header AND NOT timersel AND NOT chnid AND dr(0))
OR (msb_sig(12) AND header AND NOT timersel AND chnid AND
NOT timer_upper)
OR (lsb_sig(12) AND header AND NOT timersel AND NOT timer_lower AND
chnid AND timer_upper));
data_out(13) <= ((header AND NOT timersel AND NOT chnid AND dr(1))
OR (msb_sig(13) AND header AND NOT timersel AND chnid AND
NOT timer_upper)
OR (lsb_sig(13) AND header AND NOT timersel AND NOT timer_lower AND
chnid AND timer_upper));
data_out(14) <= ((msb_sig(14) AND header AND NOT timersel AND chnid AND
NOT timer_upper)
OR (lsb_sig(14) AND header AND NOT timersel AND NOT timer_lower AND
chnid AND timer_upper));
data_out(15) <= ((msb_sig(15) AND header AND NOT timersel AND chnid AND
NOT timer_upper)
OR (lsb_sig(15) AND header AND NOT timersel AND NOT timer_lower AND
chnid AND timer_upper));
FDCPE_lsb_sig0: FDCPE port map (lsb_sig(0),Inst_timer/lsb_count(0),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_lsb_sig1: FDCPE port map (lsb_sig(1),Inst_timer/lsb_count(1),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_lsb_sig2: FDCPE port map (lsb_sig(2),Inst_timer/lsb_count(2),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_lsb_sig3: FDCPE port map (lsb_sig(3),Inst_timer/lsb_count(3),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_lsb_sig4: FDCPE port map (lsb_sig(4),Inst_timer/lsb_count(4),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_lsb_sig5: FDCPE port map (lsb_sig(5),Inst_timer/lsb_count(5),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_lsb_sig6: FDCPE port map (lsb_sig(6),Inst_timer/lsb_count(6),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_lsb_sig7: FDCPE port map (lsb_sig(7),Inst_timer/lsb_count(7),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_lsb_sig8: FDCPE port map (lsb_sig(8),Inst_timer/lsb_count(8),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_lsb_sig9: FDCPE port map (lsb_sig(9),Inst_timer/lsb_count(9),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_lsb_sig10: FDCPE port map (lsb_sig(10),Inst_timer/lsb_count(10),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_lsb_sig11: FDCPE port map (lsb_sig(11),Inst_timer/lsb_count(11),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_lsb_sig12: FDCPE port map (lsb_sig(12),Inst_timer/lsb_count(12),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_lsb_sig13: FDCPE port map (lsb_sig(13),Inst_timer/lsb_count(13),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_lsb_sig14: FDCPE port map (lsb_sig(14),Inst_timer/lsb_count(14),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_lsb_sig15: FDCPE port map (lsb_sig(15),Inst_timer/lsb_count(15),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_msb_sig0: FDCPE port map (msb_sig(0),Inst_timer/msb_count(0),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_msb_sig1: FDCPE port map (msb_sig(1),Inst_timer/msb_count(1),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_msb_sig2: FDCPE port map (msb_sig(2),Inst_timer/msb_count(2),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_msb_sig3: FDCPE port map (msb_sig(3),Inst_timer/msb_count(3),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_msb_sig4: FDCPE port map (msb_sig(4),Inst_timer/msb_count(4),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_msb_sig5: FDCPE port map (msb_sig(5),Inst_timer/msb_count(5),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_msb_sig6: FDCPE port map (msb_sig(6),Inst_timer/msb_count(6),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_msb_sig7: FDCPE port map (msb_sig(7),Inst_timer/msb_count(7),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_msb_sig8: FDCPE port map (msb_sig(8),Inst_timer/msb_count(8),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_msb_sig9: FDCPE port map (msb_sig(9),Inst_timer/msb_count(9),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_msb_sig10: FDCPE port map (msb_sig(10),Inst_timer/msb_count(10),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_msb_sig11: FDCPE port map (msb_sig(11),Inst_timer/msb_count(11),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_msb_sig12: FDCPE port map (msb_sig(12),Inst_timer/msb_count(12),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_msb_sig13: FDCPE port map (msb_sig(13),Inst_timer/msb_count(13),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_msb_sig14: FDCPE port map (msb_sig(14),Inst_timer/msb_count(14),NOT acqclk,NOT reset,'0',NOT latch_en);
FDCPE_msb_sig15: FDCPE port map (msb_sig(15),Inst_timer/msb_count(15),NOT acqclk,NOT reset,'0',NOT latch_en);
Register Legend:
FDCPE (Q,D,C,CLR,PRE,CE);
FTCPE (Q,D,C,CLR,PRE,CE);
LDCP (Q,D,G,CLR,PRE);
****************************** Device Pin Out *****************************
Device : XC95144XL-5-TQ100
--------------------------------------------------
/100 98 96 94 92 90 88 86 84 82 80 78 76 \
| 99 97 95 93 91 89 87 85 83 81 79 77 |
| 1 75 |
| 2 74 |
| 3 73 |
| 4 72 |
| 5 71 |
| 6 70 |
| 7 69 |
| 8 68 |
| 9 67 |
| 10 66 |
| 11 65 |
| 12 64 |
| 13 XC95144XL-5-TQ100 63 |
| 14 62 |
| 15 61 |
| 16 60 |
| 17 59 |
| 18 58 |
| 19 57 |
| 20 56 |
| 21 55 |
| 22 54 |
| 23 53 |
| 24 52 |
| 25 51 |
| 27 29 31 33 35 37 39 41 43 45 47 49 |
\26 28 30 32 34 36 38 40 42 44 46 48 50 /
--------------------------------------------------
Pin Signal Pin Signal
No. Name No. Name
1 KPR 51 VCC
2 KPR 52 KPR
3 KPR 53 KPR
4 KPR 54 KPR
5 VCC 55 KPR
6 module<7> 56 KPR
7 module<6> 57 VCC
8 module<5> 58 KPR
9 module<4> 59 KPR
10 module<3> 60 KPR
11 module<2> 61 KPR
12 module<1> 62 GND
13 module<0> 63 KPR
14 pt<1> 64 KPR
15 pt<0> 65 KPR
16 dr<1> 66 KPR
17 dr<0> 67 ndwc
18 KPR 68 dwc
19 KPR 69 GND
20 reset_timer 70 timer_lower
21 GND 71 timer_upper
22 acqclk 72 chnid
23 timeclk 73 header
24 latch_en 74 timersel
25 KPR 75 GND
26 VCC 76 KPR
27 KPR 77 KPR
28 KPR 78 data_out<15>
29 KPR 79 data_out<14>
30 KPR 80 data_out<13>
31 GND 81 data_out<12>
32 KPR 82 data_out<11>
33 KPR 83 TDO
34 KPR 84 GND
35 KPR 85 data_out<10>
36 KPR 86 data_out<9>
37 KPR 87 data_out<8>
38 VCC 88 VCC
39 KPR 89 data_out<7>
40 KPR 90 data_out<6>
41 KPR 91 data_out<5>
42 KPR 92 data_out<4>
43 KPR 93 data_out<3>
44 GND 94 data_out<2>
45 TDI 95 data_out<1>
46 KPR 96 data_out<0>
47 TMS 97 KPR
48 TCK 98 VCC
49 channel<1> 99 reset
50 channel<0> 100 GND
Legend : NC = Not Connected, unbonded pin
PGND = Unused I/O configured as additional Ground pin
TIE = Unused I/O floating -- must tie to VCC, GND or other signal
KPR = Unused I/O with weak keeper (leave unconnected)
VCC = Dedicated Power Pin
GND = Dedicated Ground Pin
TDI = Test Data In, JTAG pin
TDO = Test Data Out, JTAG pin
TCK = Test Clock, JTAG pin
TMS = Test Mode Select, JTAG pin
PROHIBITED = User reserved pin
**************************** Compiler Options ****************************
Following is a list of all global compiler options used by the fitter run.
Device(s) Specified : xc95144xl-5-TQ100
Optimization Method : SPEED
Multi-Level Logic Optimization : ON
Ignore Timing Specifications : OFF
Default Register Power Up Value : LOW
Keep User Location Constraints : ON
What-You-See-Is-What-You-Get : OFF
Exhaustive Fitting : OFF
Keep Unused Inputs : OFF
Slew Rate : FAST
Power Mode : STD
Ground on Unused IOs : OFF
Set I/O Pin Termination : KEEPER
Global Clock Optimization : ON
Global Set/Reset Optimization : ON
Global Ouput Enable Optimization : ON
Input Limit : 54
Pterm Limit : 25