Contents of register <NIStatus<7>> in unit <NIDAQLogic> never changes during circuit operation. The register is replaced by logic. Contents of register <NIStatus<6>> in unit <NIDAQLogic> never changes during circuit operation. The register is replaced by logic. Contents of register <NIStatus<5>> in unit <NIDAQLogic> never changes during circuit operation. The register is replaced by logic. Contents of register <NIStatus<4>> in unit <NIDAQLogic> never changes during circuit operation. The register is replaced by logic. Contents of register <sendsig> in unit <OpticalLogic> never changes during circuit operation. The register is replaced by logic. Contents of register <SimulData> in unit <RxDataLogic> never changes during circuit operation. The register is replaced by logic. Input <NILogicBusy> is never used. Input <OPTCMD_Ack> is never used. Input <OPTLogicBusy> is never used. Signal <ack1_sync<16>> is assigned but never used. Signal <PORT1sig2> is never used or assigned. Signal <PORT1sig> is never used or assigned. Signal <cmd_en> is assigned but never used. Input <EFn> is never used. Input <FFn> is never used. Input <RXREADY> is never used. Input <HFn> is never used. Input <RXDATA> is never used. Signal <EventDataCounter> is assigned but never used. State datareceivedst is never reached in FSM <RXDATALOGICSTATE>. Input <NICMD_Ack> is never used. Input <DataPackageSize> is never used. Signal <cav2sig> is assigned but never used. Signal <ErrorFlagsig> is assigned but never used. Signal <NIStatussig<7:4>> is assigned but never used. FF/Latch <NICMD_Ack> is unconnected in block <MainLogiccomp>. FF/Latch <CMD_Ack> is unconnected in block <OpticalLogiccomp>. FF/Latch <Busy> is unconnected in block <RxDataLogiccomp>. The FF/Latch <Busy> in Unit <RxDataLogic> is equivalent to the following FF/Latch, which will be removed : <GenDatasig> FF/Latch <NICMD_Ack> is unconnected in block <MainLogiccomp>. FF/Latch <CMD_Ack> is unconnected in block <OpticalLogiccomp>.