Release 8.2i - xst I.31
Copyright (c) 1995-2006 Xilinx, Inc.  All rights reserved.
--> Parameter TMPDIR set to ./xst/projnav.tmp
CPU : 0.00 / 0.22 s | Elapsed : 0.00 / 1.00 s
 
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=========================================================================
*                          HDL Compilation                              *
=========================================================================
Compiling vhdl file "//engfile3/ddoering/Projects/SAO/VHDL/SAORXBoard/RxDataLogic.vhd" in Library work.
Architecture behavioral of Entity rxdatalogic is up to date.
Compiling vhdl file "//engfile3/ddoering/Projects/SAO/VHDL/SAORXBoard/TransmitCommand.vhd" in Library work.
Architecture behavioral of Entity transmitcommand is up to date.
Compiling vhdl file "//engfile3/ddoering/Projects/SAO/VHDL/SAORXBoard/OpticalLogic.vhd" in Library work.
Entity <opticallogic> compiled.
Entity <opticallogic> (Architecture <behavioral>) compiled.
CPU : 0.36 / 0.58 s | Elapsed : 0.00 / 1.00 s
 
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Total memory usage is 106584 kilobytes

Number of errors   :    0 (   0 filtered)
Number of warnings :    0 (   0 filtered)
Number of infos    :    0 (   0 filtered)