# Reading C:/Modeltech_xe/tcl/vsim/pref.tcl 
# do ebeam_tbw.tdo 
# ** Warning: (vlib-34) Library already exists at "work".
# Model Technology ModelSim XE II vcom 5.7c Compiler 2003.03 Mar 15 2003
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Loading package vital_timing
# -- Loading package vcomponents
# -- Loading package vital_primitives
# -- Loading package textio
# -- Loading package vpackage
# -- Compiling entity ebeam_ctrl
# -- Compiling architecture structure of ebeam_ctrl
# -- Loading entity x_buf
# -- Loading entity x_xor2
# -- Loading entity x_or2
# -- Loading entity x_ff
# -- Loading entity x_zero
# -- Loading entity x_one
# -- Loading entity x_and2
# -- Loading package std_logic_arith
# -- Loading package std_logic_unsigned
# -- Loading entity x_and16
# -- Loading entity x_or6
# -- Loading entity x_or3
# -- Loading entity x_and32
# -- Loading entity x_or5
# -- Loading entity x_and4
# -- Loading entity x_and3
# -- Loading entity x_and5
# -- Loading entity x_or4
# -- Loading entity x_inv
# -- Loading package vital_timing
# -- Loading entity x_roc
# Model Technology ModelSim XE II vcom 5.7c Compiler 2003.03 Mar 15 2003
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Loading package std_logic_arith
# -- Loading package std_logic_unsigned
# -- Loading package textio
# -- Loading package std_logic_textio
# -- Compiling entity ebeam_tbw
# -- Compiling architecture testbench_arch of ebeam_tbw
# -- Loading package vital_timing
# -- Loading package vcomponents
# -- Loading package vital_primitives
# -- Loading package vpackage
# -- Loading entity ebeam_ctrl
# -- Compiling configuration ebeam_ctrl_cfg
# -- Loading entity ebeam_tbw
# -- Loading architecture testbench_arch of ebeam_tbw
# vsim -lib work -sdfmax /UUT=ebeam_ctrl_timesim.sdf -t 1ps ebeam_tbw 
# ** Warning: A ModelSim starter license was detected and will be used, even though you have installed ModelSim XE. You should obtain an XE license in order to access ModelSim XE's full capabilities.# Loading C:/Modeltech_xe/win32xoem/../std.standard
# Loading C:/Modeltech_xe/win32xoem/../ieee.std_logic_1164(body)
# Loading C:/Modeltech_xe/win32xoem/../ieee.std_logic_arith(body)
# Loading C:/Modeltech_xe/win32xoem/../ieee.std_logic_unsigned(body)
# Loading C:/Modeltech_xe/win32xoem/../std.textio(body)
# Loading C:/Modeltech_xe/win32xoem/../ieee.std_logic_textio(body)
# Loading C:/Modeltech_xe/win32xoem/../vital2000.vital_timing(body)
# Loading C:/Modeltech_xe/win32xoem/../xilinx/vhdl/simprim.vcomponents
# Loading C:/Modeltech_xe/win32xoem/../vital2000.vital_primitives(body)
# Loading C:/Modeltech_xe/win32xoem/../xilinx/vhdl/simprim.vpackage(body)
# Loading work.ebeam_tbw(testbench_arch)
# Loading C:/Modeltech_xe/win32xoem/../ieee.vital_timing(body)
# Loading work.ebeam_ctrl(structure)
# Loading C:/Modeltech_xe/win32xoem/../xilinx/vhdl/simprim.x_buf(x_buf_v)
# Loading ebeam_ctrl_timesim.sdf
# Loading C:/Modeltech_xe/win32xoem/../xilinx/vhdl/simprim.x_xor2(x_xor2_v)
# Loading C:/Modeltech_xe/win32xoem/../xilinx/vhdl/simprim.x_or2(x_or2_v)
# Loading C:/Modeltech_xe/win32xoem/../xilinx/vhdl/simprim.x_ff(x_ff_v)
# Loading C:/Modeltech_xe/win32xoem/../xilinx/vhdl/simprim.x_zero(x_zero_v)
# Loading C:/Modeltech_xe/win32xoem/../xilinx/vhdl/simprim.x_one(x_one_v)
# Loading C:/Modeltech_xe/win32xoem/../xilinx/vhdl/simprim.x_and2(x_and2_v)
# Loading C:/Modeltech_xe/win32xoem/../xilinx/vhdl/simprim.x_and16(x_and16_v)
# Loading C:/Modeltech_xe/win32xoem/../xilinx/vhdl/simprim.x_or6(x_or6_v)
# Loading C:/Modeltech_xe/win32xoem/../xilinx/vhdl/simprim.x_or3(x_or3_v)
# Loading C:/Modeltech_xe/win32xoem/../xilinx/vhdl/simprim.x_and32(x_and32_v)
# Loading C:/Modeltech_xe/win32xoem/../xilinx/vhdl/simprim.x_or5(x_or5_v)
# Loading C:/Modeltech_xe/win32xoem/../xilinx/vhdl/simprim.x_and4(x_and4_v)
# Loading C:/Modeltech_xe/win32xoem/../xilinx/vhdl/simprim.x_and3(x_and3_v)
# Loading C:/Modeltech_xe/win32xoem/../xilinx/vhdl/simprim.x_and5(x_and5_v)
# Loading C:/Modeltech_xe/win32xoem/../xilinx/vhdl/simprim.x_or4(x_or4_v)
# Loading C:/Modeltech_xe/win32xoem/../xilinx/vhdl/simprim.x_inv(x_inv_v)
# Loading C:/Modeltech_xe/win32xoem/../ieee.vital_primitives(body)
# Loading C:/Modeltech_xe/win32xoem/../xilinx/vhdl/simprim.x_roc(x_roc_v)
# WARNING: Design size of 14077 statements or 0 non-Xilinx leaf instances exceeds ModelSim XE-Starter recommended capacity.
# Expect performance to be quite adversely affected.
# ** Note: (vsim-3587) SDF Backannotation Successfully Completed.
#    Time: 0 ps  Iteration: 0  Region: /ebeam_tbw  File: ebeam_tbw.timesim_vhw
# .wave
# .structure
# .signals
# ** Failure: Simulation successful (not a failure).  No problems detected. 
#    Time: 57608 ns  Iteration: 0  Process: /ebeam_tbw/line__925 File: ebeam_tbw.timesim_vhw
# Break at ebeam_tbw.timesim_vhw line 947
# Simulation Breakpoint: Break at ebeam_tbw.timesim_vhw line 947
# MACRO ./ebeam_tbw.tdo PAUSED at line 14
destroy .wave