-- C:\JFB\XILINX\MWD\WORK\EBEAM\EBEAM -- VHDL Annotation Test Bench created by -- HDL Bencher 6.1i -- Mon Feb 21 16:42:46 2005 LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_ARITH.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; USE IEEE.STD_LOGIC_TEXTIO.ALL; USE STD.TEXTIO.ALL; ENTITY ebeam_tbw IS END ebeam_tbw; ARCHITECTURE testbench_arch OF ebeam_tbw IS -- If you get a compiler error on the following line, -- from the menu do Options->Configuration select VHDL 87 FILE RESULTS: TEXT OPEN WRITE_MODE IS "c:\jfb\xilinx\mwd\work\ebeam\ebeam\ebeam_tbw.ano"; COMPONENT ebeam_ctrl PORT ( reset : In std_logic; reset_timer : In std_logic; timeclk : In std_logic; sysclk : In std_logic; ebeam_oe : In std_logic; ebeam_sig : In std_logic; timer1 : In std_logic; timer2 : In std_logic; upword : In std_logic; loword : In std_logic; ebeam_data : Out std_logic_vector (15 DOWNTO 0) ); END COMPONENT; SIGNAL reset : std_logic; SIGNAL reset_timer : std_logic; SIGNAL timeclk : std_logic; SIGNAL sysclk : std_logic; SIGNAL ebeam_oe : std_logic; SIGNAL ebeam_sig : std_logic; SIGNAL timer1 : std_logic; SIGNAL timer2 : std_logic; SIGNAL upword : std_logic; SIGNAL loword : std_logic; SIGNAL ebeam_data : std_logic_vector (15 DOWNTO 0); BEGIN UUT : ebeam_ctrl PORT MAP ( reset => reset, reset_timer => reset_timer, timeclk => timeclk, sysclk => sysclk, ebeam_oe => ebeam_oe, ebeam_sig => ebeam_sig, timer1 => timer1, timer2 => timer2, upword => upword, loword => loword, ebeam_data => ebeam_data ); PROCESS -- clock process for sysclk, VARIABLE TX_TIME : INTEGER :=0; PROCEDURE ANNOTATE_ebeam_data( TX_TIME : INTEGER ) IS VARIABLE TX_STR : String(1 to 4096); VARIABLE TX_LOC : LINE; BEGIN STD.TEXTIO.write(TX_LOC,string'("Annotate[")); STD.TEXTIO.write(TX_LOC, TX_TIME); STD.TEXTIO.write(TX_LOC,string'(",ebeam_data,")); IEEE.STD_LOGIC_TEXTIO.write(TX_LOC, ebeam_data); STD.TEXTIO.write(TX_LOC, string'("]")); TX_STR(TX_LOC.all'range) := TX_LOC.all; STD.TEXTIO.writeline(results, TX_LOC); STD.TEXTIO.Deallocate(TX_LOC); END; BEGIN CLOCK_LOOP : LOOP sysclk <= transport '0'; WAIT FOR 4 ns; TX_TIME := TX_TIME + 4; sysclk <= transport '1'; WAIT FOR 4 ns; TX_TIME := TX_TIME + 4; ANNOTATE_ebeam_data(TX_TIME); WAIT FOR 116 ns; TX_TIME := TX_TIME + 116; sysclk <= transport '0'; WAIT FOR 116 ns; TX_TIME := TX_TIME + 116; END LOOP CLOCK_LOOP; END PROCESS; PROCESS -- clock process for timeclk, VARIABLE TX_TIME : INTEGER :=0; BEGIN CLOCK_LOOP : LOOP timeclk <= transport '0'; WAIT FOR 4 ns; TX_TIME := TX_TIME + 4; timeclk <= transport '1'; WAIT FOR 4 ns; TX_TIME := TX_TIME + 4; WAIT FOR 1916 ns; TX_TIME := TX_TIME + 1916; timeclk <= transport '0'; WAIT FOR 1916 ns; TX_TIME := TX_TIME + 1916; END LOOP CLOCK_LOOP; END PROCESS; PROCESS -- Process for sysclk VARIABLE TX_OUT : LINE; BEGIN -- -------------------- reset <= transport '0'; reset_timer <= transport '0'; ebeam_oe <= transport '1'; timer1 <= transport '1'; timer2 <= transport '1'; upword <= transport '1'; loword <= transport '1'; -- -------------------- WAIT FOR 720 ns; -- Time=720 ns reset_timer <= transport '1'; -- -------------------- WAIT FOR 960 ns; -- Time=1680 ns reset <= transport '1'; -- -------------------- WAIT FOR 36960 ns; -- Time=38640 ns ebeam_oe <= transport '0'; -- -------------------- WAIT FOR 720 ns; -- Time=39360 ns timer1 <= transport '0'; -- -------------------- WAIT FOR 720 ns; -- Time=40080 ns upword <= transport '0'; -- -------------------- WAIT FOR 480 ns; -- Time=40560 ns upword <= transport '1'; -- -------------------- WAIT FOR 240 ns; -- Time=40800 ns loword <= transport '0'; -- -------------------- WAIT FOR 480 ns; -- Time=41280 ns loword <= transport '1'; -- -------------------- WAIT FOR 240 ns; -- Time=41520 ns timer1 <= transport '1'; -- -------------------- WAIT FOR 1680 ns; -- Time=43200 ns timer2 <= transport '0'; -- -------------------- WAIT FOR 480 ns; -- Time=43680 ns upword <= transport '0'; -- -------------------- WAIT FOR 480 ns; -- Time=44160 ns upword <= transport '1'; -- -------------------- WAIT FOR 240 ns; -- Time=44400 ns loword <= transport '0'; -- -------------------- WAIT FOR 480 ns; -- Time=44880 ns loword <= transport '1'; -- -------------------- WAIT FOR 480 ns; -- Time=45360 ns timer2 <= transport '1'; -- -------------------- WAIT FOR 3120 ns; -- Time=48480 ns ebeam_oe <= transport '1'; -- -------------------- WAIT FOR 9128 ns; -- Time=57608 ns -- -------------------- STD.TEXTIO.write(TX_OUT, string'("Total[]")); STD.TEXTIO.writeline(results, TX_OUT); ASSERT (FALSE) REPORT "Success! Simulation for annotation completed" SEVERITY FAILURE; END PROCESS; PROCESS -- Process for Asynchronous Signals VARIABLE TX_OUT : LINE; BEGIN -- -------------------- ebeam_sig <= transport '0'; -- -------------------- WAIT FOR 12248 ns; -- Time=12248 ns ebeam_sig <= transport '1'; -- -------------------- WAIT FOR 11436 ns; -- Time=23684 ns ebeam_sig <= transport '0'; -- -------------------- WAIT FOR 255 ns; -- Time=23939 ns -- -------------------- WAIT FOR 33669 ns; -- Time=57608 ns -- -------------------- STD.TEXTIO.write(TX_OUT, string'("Total[]")); STD.TEXTIO.writeline(results, TX_OUT); ASSERT (FALSE) REPORT "Success! Simulation for annotation completed" SEVERITY FAILURE; END PROCESS; END testbench_arch; CONFIGURATION ebeam_ctrl_cfg OF ebeam_tbw IS FOR testbench_arch END FOR; END ebeam_ctrl_cfg;