------------------------------------------------------------------------------ ROD Controller FPGA Revision History ------------------------------------------------------------------------------ Version 4.Ff : Changes: Implemented ECR Flush logic to Flush all Data Path FIFOs on an ECR To enable function, Set Bit 1 in Register 0x00404414 to value '1' To Force a SW ECR Flush, when enabled, set Bit 0 in Reg 0x00404414 to value '1' (Self-Clearing Bit). Added Formatter ModeBits FIFO Full Flag to the ROD Busy logic to prevent overflow of the MB-FIFO counters during runtime. Modified the Formatter ModeBits generator to send ModeBits to both Formatter banks simultaneously ------------------------------------------------------------------------------ Version 4.9f : Changes: FE Command logic Mods ECR Reset of trigger and EVID Modules User enabled ECR reset/flush to EFB Disabled Logic added in Ver3.9 that we think caused the corrupt SLink Data Tx ------------------------------------------------------------------------------ Version 4.5f : Changes: Changed the operation of the timer in the FE Command Generator. If the EFB Event ID wait limit register value is set to 0x0h, then the RCF will wait until an Event ID arrives on the ROD before issuing the Formatter Readout tokens. If the wait limit register is set to a non-zero value, then the time out limit duration is equal to value*25ns. The register setting default is 0x0h. ------------------------------------------------------------------------------ Version 4.4f : Changes: Added the EFB Event ID FIFO Full flag to the ROD Bus logic to assert ROD Busy when the EFB Event ID or Fragment Header FIFOs are full due to the ROS asserting Xoff. ------------------------------------------------------------------------------ Version 3.9f : Changes: Added timer to FE Command Generator to allow Readout triggers in the case when there is no EFB Event ID on the ROD. The timer waits for 7.5us OR EFB_Ready to be true before sending the FE Readout Token. Removed the EventID FIFO word counts for the ROD_Busy determination tree. MUST BE USED WITH efb_v33f.bin or later ------------------------------------------------------------------------------ Version 3.8f : Changes: Added register bit to allow manual setting of ROD Busy. The control is enabled when bit 24 of RCF register 0x00404428 is value = 1 and disabled when value = 0 ------------------------------------------------------------------------------ Version 3.7f : Changes: Added logic to allow EFB Event FIFO Almost Full to assert ROD Busy, configurable by the user - Bit 10 of RCF register 0x00404414 ------------------------------------------------------------------------------ Version 3.6f : Changes: Added logic to the FE Command Processor to send fast commands to the Formatters on the MB_FIFO_RST lines ------------------------------------------------------------------------------ Version 3.5f : Changes: Added busy signal to FE Command Processor block to fix a race condition in the trigger counting logic ------------------------------------------------------------------------------ Version 3.4f : Changes: Current Version - Verify that notes from v33 are correct. Added the signals so that TIM generated L1A, ECR and BCR command streams can be routed to the FMT_MB_RST_N output to send fast commands to the FMTs for simulator control. Added busy signal to FE CMD Processor block to prevent sync errors caused by L1A/BCR overlaps. ------------------------------------------------------------------------------ Version 3.3f : Changes: Added FFTV block to design for SCT ROD, but did not connect completely ------------------------------------------------------------------------------ Version 3.2f : Changes: Added status register at 00x004044EC to display the last L1ID that sent to the EFB in an Event ID Packet ------------------------------------------------------------------------------ Version 3.2f : Built with ISE8.2i SP3 Changes: Added Event Counters to count all L1A triggers and L1A triggers that arrive when ROD Busy is asserted ------------------------------------------------------------------------------ Version 3.1f : Built with ISE8.2i SP3 Changes: None - Intermediate version ------------------------------------------------------------------------------ Version 3.0f : Built with ISE8.2i SP3 Changes: Modified Status Register sync processes in top.vhd, fe_cal_command_generator.vhd and testbench_interface.vhd to reduce utilization. All functions tested OK. ------------------------------------------------------------------------------ Version 2.Ff : Built with ISE8.2i SP3 Changes: Modified front_end_occupancy_counters.vhd and LED counters to reduce utilization ------------------------------------------------------------------------------ Version 2.Ef : Built with ISE8.2i SP3 Changes: Built using ISE82i SP3, started with Ver 2.7f. Added in changes from Ver 2.Af, 2.Cf, and 2.Df. Does not include the FFTV block. Tested OK on NI TestStand ------------------------------------------------------------------------------ Version 2.Df : Built with ISE5.2i SP3 Changes: Added latching function to ROD Busy Status Bits ------------------------------------------------------------------------------ Version 2.Cf - Built with ISE5.2i SP3 Changes: Modified pause_triggers_i signal to include "EFB Pause to Formatter" and Removed (commented) sweeper_event_on_rod from Rod Busy formula. ------------------------------------------------------------------------------ Version 2.Bf Changes: Same VHDL as V2.Af. Built with ISE 8.2i SP3 ------------------------------------------------------------------------------ Version 2.Af Changes: Inverted BOC_CLOCK_OK and TIM_CLOCK_OK bits in the EFB header/dynamic mask encoder so that they do not cause error bits to be set in the Event Fragment trailer error status words ------------------------------------------------------------------------------ Version 2.9f Changes: Reverted fftv counter sizes to original values ------------------------------------------------------------------------------ Version = 2.8f Changes: Reverted fftv counter sizes to original numbers ------------------------------------------------------------------------------ Version = 2.8f Changes: Added Matt Warren's FFTV block to RCF. Version is slightly modified to monitor triggers on both MDSP serial ports. The FFTV block only vetos triggers generated by the MDSP on the SCT RODs and is disabled during RoL test block Tx. ------------------------------------------------------------------------------ Version = 2.7f Changes: Fixed NoActiveGroup first trigger bug in IntScan Engine. Expanded EFB Event ID couunter values in the Register Block to 7 bits each. (see Register 0x0040445C) Increase L1ID/BCID FIFO in Event ID generation block (efb_headerdynamicmask_encoder.vhd) to 1024x16. Removed Xilinx specific STARTUP_VIRTEX block. ------------------------------------------------------------------------------ Version = 2.6f Changes: Added Cross-talk Scan Modes to internal trigger scan engine. In cross-talk scan mode, the corrective masks LUTs must be used, so Group mapping will be G0>G8, G1>G9 etc. Gn uses the default masks and Gn+8 uses the corrective masks. The 2 types of cross-talk configurations that are supported are staggered CAL/TD/L1 to both Module groups, and CAL/TD/L1 to one group and NOCAL/TD/L1 to the other group. (NOCAL = "000000000" serial stream. Added an 8 bit Pre-Cal delay to Bits[31:24] of the NEvents register. Added an On state to the SLON LED to indicate when data is sent on the SLink. ------------------------------------------------------------------------------ Version = 2.5f Changes: Added a 10 bit L1 Trigger counter to the FE Command pulse block. The counter increments whenever a L1A is detected on the ROD from any Trigger source and replaces the FIFO occupancy counteron the FIFO that stores the Triggers. The count value is posted to spare_stts_reg(18:8). ------------------------------------------------------------------------------ Version = 2.4f Changes: Added MDSP SP1 port into Internal Scan Engine, modified build parameters with --pragma statements. Connected the OE of the FE Command Output to the FE Command enable bit. Changed the Event ID almost full mechanism. Increase the Event queue up/down counters from 64 to 128 to allow use of the larger block RAMs in the design. ------------------------------------------------------------------------------ Version = 2.3f Changes: Masked FE Occ Counters in Pixel RCF. Fixed FMT_WR_TR to FE_OCC_COUNT mapping bug in FE Occ Block. ------------------------------------------------------------------------------ Version = 2.2f Changes: More Internal Scan Engine Changes ------------------------------------------------------------------------------ Version = 2.1f Changes: Bugs in the Internal Scan Engine. Added signal to indicate to the Int Scan Block that the ROD TT has been loaded into the event word ------------------------------------------------------------------------------ Version = 2.0f Changes: Initialized mdsp_gpreg to 0 in Register Block. ------------------------------------------------------------------------------ Version = 1.Ff Changes: Modified Address_Decoder use RE_N instead od OE_N to transition async bus cycles. Added setup time to New Mask signal in IntScan. ------------------------------------------------------------------------------ Version = 1.Ef Changes: Reduced to 4 Int Scan Groups and fixed Trigger Generation bug ------------------------------------------------------------------------------ Version = 1.Df Changes: Mapped odd groups in the internal scan engine to the same LUTs as the DSP scan engine. Removed the IntScanEngine connection to SP1. ------------------------------------------------------------------------------ Version = 1.CF Changes: Removed additional internal reset bits from various control blocks. EFBDM, FMTMB, TB, TSD, & FECMDP WR protected Bit 28 of the RCF Control Register for SCT to disable the internalscan engine. Moved cnfg readback counter commeand in ConfigRead/CalTest processes. Connected IntScanNeventDone to the register block at location 0x004044D8 and fixed event interval bug ------------------------------------------------------------------------------ Version = 1.BF Changes: Added a FIFO to queue ROD ID Type for each event. ------------------------------------------------------------------------------ Version = 1.AF Changes: Modified ROL Test Block State Machine to allow programmable trigger operation ------------------------------------------------------------------------------ Version = 1.9F Changes: Modified ROL Test Block State Machine to allow operation if LDown is asserted. ------------------------------------------------------------------------------ Version = 1.8F Changes: Modified ROL Test Block State Machine to improve graceful exit ------------------------------------------------------------------------------ Version = 1.7F Changes: Modified ROL Test Block State Machine to allow all block size Test Runs. ------------------------------------------------------------------------------ Version = 1.6F Changes: Disabled automatic ROD ID update from FE CMD Mask register ------------------------------------------------------------------------------ Version = 1.5F Changes: Moved Router control signal for ROL Test to EFB to create a graceful exit from ROL Test Block Mode Removed EFB Ready SR and substituted EFB_ready_in to issue triggers in the fe_command_pulse_counter FSM ------------------------------------------------------------------------------ Version = 1.4F Changes: Tuned L1A trigger timing for ROL Block to maximize data throughput ------------------------------------------------------------------------------ Version = 1.3F Changes: Added EFB Event ID FIFO Full to ROL block pause trigger state ------------------------------------------------------------------------------ Version = 1.2F Changes: Added Trigger out signal on ResetCmdOut(1) to start RODBusy Module Histogram engine in the PRM ------------------------------------------------------------------------------ Version = 1.1F Changes: Added ROD Busy Control to Sweeper Event Implementation ------------------------------------------------------------------------------ Version = 1.0F Changes: JMJ, 9/7/2005 Added Internal Scan Engine Added ROL Test Block Control Changed ROD Event Type Size to 6 bits Compacted Event ID Stream 07/17/01 JMJ First version - adapted from MLN RRIF Version