------------------------------------------------------------------------------ ATLAS SiROD Event Fragment Builder FPGA Revision History ------------------------------------------------------------------------------ Version = 4.2f Oct 26th, 2015 Changes: Added logic to extend the reset signal to the external Event FIFOs ------------------------------------------------------------------------------ Version = 4.0f Oct 23rd, 2015 Changes: Restored design to data flow based on v32 with the efb_ready signal used to advance events through the ROD. Retained all diagnostics added since v32 ------------------------------------------------------------------------------ Version = 3.Af July 7th, 2015 Changes: Added Event Mem FIFO Word Count FIFO Occupancy and Flags to EFB reg 0x0040223C. Bits 7 to 0 are the FIFO Occupancy, bit 8 is the Empty Flag, bit 9 is the Almost Full Flag, and bit 10 is the Full Flag. Values repeat for the upper half word. The Word Count values should always track. Version 3.8f and 3.9f included changes to the overall FIFO monitoring structure of the EFB to prevent overflow conditions when running in normal operating modes with Xoff from the ROS system. ------------------------------------------------------------------------------ Version = 3.7f Mar 26th, 2015 Changes: Connected Event Fragment Header FIFO Full flag to the RCF to add into ROD Busy logic. The Event Fragment Header FIFO can store up to 255 Events when the S-Link asserts Xoff. If more events arrive at the EFB at this point, the ROD will lose synchronization. ------------------------------------------------------------------------------ Version = 3.3f Oct 27, 2013 Changes: Removed test of EvtID data to TX a Fragment to the S-Link. Events will always flow. If there is no EvtID info and a Fragment is processed, the EFB will latch the Empty_Event_Error bit and add a ERROR flag to the Fragment in bit 18 of Error Summary Word #2. The Empty_Event_Error bit can be cleared by either resetting the EFB FPGA or Setting bit1 of register 0x00402210 to value=1 (self-clearing). MUST BE USED with rcf_v39f.bin or later ------------------------------------------------------------------------------ Version = 3.2f Sept 15, 2012 Changes: Added Header Event ID FIFO Word Count to Register 0x0040224C Bits [31:24] Currently Pixel Only ------------------------------------------------------------------------------ Version = 3.1f Oct 30 2009 Changes: Implemented an Event Over Limit function to indicate in the Event Fragment Header if an Event is over a user defined threshold. For Control: Reg 0x00402214, Bits[14:0] event_threshold_limit_i Bit[15] Enable when set = 1 Signals previously in 0x00402214 Reg moved to 0x00402218 B[23:16] Format in Event Fragment: X"B0F" & 0 & Event Size Over Threshold & ROL Test Block Enable & Error detected in Event & ROD Trigger Type & TIM Trigger Type & Atlas Trigger Type ------------------------------------------------------------------------------ Version = 3.0f Oct 30 2009 Changes: SCT Only Change - Added register location for user settable HV Flags and provision to insert them into the Event Fragment trailer, Bits[23:20] of the Error Count Word ------------------------------------------------------------------------------ Version = 2.Ff Oct 19 2009 Changes: Removed DSP Masked Link bit from BCID/L1ID error check block for Pixel ROD. ------------------------------------------------------------------------------ Version = 2.Ef May 26 2009 Changes: Cleaned up error detect algorithm to prevent double counting of errors. ------------------------------------------------------------------------------ Version = 2.Df May 25 2009 Changes: Modified id check, error detect, and output data formatting to detect and count links that have been masked by the MDSP. The implementation is ready for SCT testing only. The error flag has been added to bit[25] of the Event Trailer Error Status word, and the data stream addition is included in bit[7] of the link header of an affected link. ------------------------------------------------------------------------------ Version = 2.Cf Jan 21 2009 Changes: Minor cleanup of bug fixes in v2Bf. Inserted new bcid variables into The reset state of the new processes. Verified operation in PXL SR1 ------------------------------------------------------------------------------ Version = 2.Bf Jan 21 2009 Changes: Bug in the BCID Rollover comparison algorithm caused BCID errors flags to be set incorrectly when the offset value was negative. Modified the ev_data_decode block by increasing the size of the bcid_offset variable with an upper nibble that is determined by the value of the MSB of the BCID OFFSET 8 bit value. Removed BCID error flag mask for MCC skipped events. ------------------------------------------------------------------------------ Version = 2.Af Changes: Masked BCID Error flag when the EFB is processing MCC Empty Events ------------------------------------------------------------------------------ Version = 2.9f Changes: Changed Event Format to meet ATL-D-ES-0019 v4.0. Source ID bits [24 to 31] have been changed to a user accessible field. Changed BCID offset algorithm to handle the ATLAS BCID rollover at 3564. Register bit 13 in EFB_CMND_0 allows the user to select either a 4096 (default 0) or 3564 (1) as the BCID rollover point. ------------------------------------------------------------------------------ Version = 2.8f Changes: Added logic to allow RoL packets to pass the true TIM BCID instead of the static "BCID" marker required in the RoL Format Specification. To enable, set bit 12 in EFB_CNMD_0 to value 1. ------------------------------------------------------------------------------ Version = 2.7f Changes: Added logic to the gen_fragment block to set a bit in the event header to indicate that the event has an error. The error flag is in the first word of the fragment ------------------------------------------------------------------------------ Version = 2.6f Changes: Added logic to flush Event FIFO after a reset from the PRM ------------------------------------------------------------------------------ Version = 2.5f Changes: Changed L1ID/BCID check algorithm to ignore BCID and L1ID for timeout events ------------------------------------------------------------------------------ Version = 2.4f Changes: Minor modifications to clean up L1ID/BCID Trap algorithms ------------------------------------------------------------------------------ Version = 2.3f Changes: Commented out all logic related to the Sync_Event Error bit Added L1ID comparison registers from 0x00402280 to 0x00402340 Removed data_out from FIFO clearing mux in fifo_ramb.vhd ------------------------------------------------------------------------------ Version = 2.2f Changes: Event Format Rev value set to 3.1 ------------------------------------------------------------------------------ Version = 2.1f Changes: Event Format Rev still at 3.0, Added debug pins for SN 286 and 287 ------------------------------------------------------------------------------ Version = 2.0f Changes: Temporarily reverted Event Format Rev to 3.0 ------------------------------------------------------------------------------ Version = 1.Ff Changes: Removed Run Number Increment on Sweeper Event. Commented out Sync Error Event logic from Gen_Fragment ------------------------------------------------------------------------------ Version = 1.Ef Changes: Updates to meet requirements of ATLAS Event Format Specification 3.1. Built using ISE8.2i SP3 ------------------------------------------------------------------------------ Version = 1.Df Changes: Added signal from Router to pull events from Event FIFO during calibration mode operation. This function will be disabled by the Router during Physics Data-Taking Mode. Mods to TOP and Gen-Fragment Blocks. EFB SparePin(23) is used for the Hold-Next-Event signal. If the signal is low, the EFB will send events as fast as possible, if it is high, the EFB will hold the start of the next event until the signal goes low. ------------------------------------------------------------------------------ Version = 1.Cf Changes: Increased RunNumber Counter from 24 bits to 31 bits in size ------------------------------------------------------------------------------ Version = 1.Bf Changes: Removed Error in Event signal from B0F word in gen_fragment ------------------------------------------------------------------------------ Version = 1.Af Changes: Fixed logic error in Error mask for bit 3 of the Error Word ------------------------------------------------------------------------------ Version = 1.9f Changes: Fixed data truncation for Header/Trailer for events on odd boundaries in format_data.vhd. The affected links were 3B and 7B only. ------------------------------------------------------------------------------ Version = 1.8f Changes: Fixed reset issue for output signal "ev_data_almost_full_n" after running ROL test blocks ------------------------------------------------------------------------------ Version = 1.7f Changes: Moved global L1ID and BCID masking to err_detect.vhd. This change suppresses the error flag in the Event Fragment and passes the error flag in the link data. Cleaned up unused signals in efb_bus_interface.vhd and gen_fragment.vhd. ------------------------------------------------------------------------------ Version = 1.6f Changes: Recompiled v1.5f using ISE5.2 SP4, fixed bug in Link Error mask algorithm. ------------------------------------------------------------------------------ Version = 1.5f Changes: Added bit to mask Run Number Increment when sweeper event arrives. ------------------------------------------------------------------------------ Version = 1.4f Changes: Decreased EvID FIFO Alomost Full to 120 events ------------------------------------------------------------------------------ Version = 1.3f Changes: Modified Gen_Fragment to post actual block size into Event Word Count Field ------------------------------------------------------------------------------ Version = 1.2f Changes: Modified Gen_Fragment to allow longer ROL block sizes ------------------------------------------------------------------------------ Version = 1.0f Changes: Modified Event Format per version 3.0 doc Corrected Status words per Event Format Doc Increased Error Mask to 32 bits Changed mapping of Error Mask and status bits Added Run Number Logic Increased the number of Error Counters to 32 Reduced Error Counters from 16 to 8 bits Compacted the Error Count Registers Added Sync Error Bit to EFB Run Time Status Register Added FIFO full flags to FIFO Status Register\ ------------------------------------------------------------------------------ Version = 2.Ce Changes: Removed Invalid TOT error/Added error count on half word ------------------------------------------------------------------------------ Version = 2.Be Changes: ------------------------------------------------------------------------------ Version = 2.Ae Changes: Added Error Count Registers to the Memory Map ------------------------------------------------------------------------------ Version = 2.9e Changes: Added correct SCT Sequential Chip Error detect ------------------------------------------------------------------------------ Version = 2.2e Changes: Added ROD Busy from the Formatter to the Mux Output Increase Output WC FIFO to 256x16 RAMB Implementation Added count_fifo_afull to Formatter back pressure ------------------------------------------------------------------------------ Version = 2.1e Changes: Removed "Send Empty Events" function ------------------------------------------------------------------------------ Version = 2.0e Changes: Changed Pixel Data Format, added Run Number to Event Header ------------------------------------------------------------------------------ Version = 1.5e Changes: Added L1ID error check offset per ATC-TD-EC-0002 Added BCID Offset Value for error checking Fixed Error Mask Write problem. ------------------------------------------------------------------------------ Version = 1.4e Changes: Added Event Group Counters Converted EFB/ROD Bus access to D32 Added Run Number Register to Address Map